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64 lines
2.0 KiB
64 lines
2.0 KiB
4 months ago
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/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <platform_def.h>
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#include <drivers/arm/gicv2.h>
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#include <plat/common/platform.h>
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/******************************************************************************
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* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
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* interrupts.
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*****************************************************************************/
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static const interrupt_prop_t poplar_interrupt_props[] = {
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POPLAR_G1S_IRQ_PROPS(GICV2_INTR_GROUP0),
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POPLAR_G0_IRQ_PROPS(GICV2_INTR_GROUP0)
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};
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static unsigned int target_mask_array[PLATFORM_CORE_COUNT];
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static const gicv2_driver_data_t poplar_gic_data = {
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.gicd_base = POPLAR_GICD_BASE,
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.gicc_base = POPLAR_GICC_BASE,
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.interrupt_props = poplar_interrupt_props,
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.interrupt_props_num = ARRAY_SIZE(poplar_interrupt_props),
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.target_masks = target_mask_array,
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.target_masks_num = ARRAY_SIZE(target_mask_array),
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};
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/******************************************************************************
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* Helper to initialize the GICv2 only driver.
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*****************************************************************************/
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void poplar_gic_driver_init(void)
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{
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gicv2_driver_init(&poplar_gic_data);
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}
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void poplar_gic_init(void)
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{
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gicv2_distif_init();
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gicv2_pcpu_distif_init();
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gicv2_set_pe_target_mask(plat_my_core_pos());
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gicv2_cpuif_enable();
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}
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/******************************************************************************
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* Helper to enable the GICv2 CPU interface
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*****************************************************************************/
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void poplar_gic_cpuif_enable(void)
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{
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gicv2_cpuif_enable();
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}
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/******************************************************************************
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* Helper to initialize the per cpu distributor interface in GICv2
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*****************************************************************************/
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void poplar_gic_pcpu_init(void)
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{
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gicv2_pcpu_distif_init();
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gicv2_set_pe_target_mask(plat_my_core_pos());
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}
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