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85 lines
3.0 KiB
85 lines
3.0 KiB
4 months ago
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//===- AArch64CallLowering.h - Call lowering --------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file describes how to lower LLVM calls to machine code calls.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
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#define LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/CodeGen/GlobalISel/CallLowering.h"
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#include "llvm/IR/CallingConv.h"
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#include <cstdint>
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#include <functional>
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namespace llvm {
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class AArch64TargetLowering;
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class CCValAssign;
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class DataLayout;
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class MachineIRBuilder;
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class MachineRegisterInfo;
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class Type;
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class AArch64CallLowering: public CallLowering {
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public:
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AArch64CallLowering(const AArch64TargetLowering &TLI);
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bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
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ArrayRef<Register> VRegs,
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Register SwiftErrorVReg) const override;
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bool fallBackToDAGISel(const Function &F) const override;
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bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
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ArrayRef<ArrayRef<Register>> VRegs) const override;
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bool lowerCall(MachineIRBuilder &MIRBuilder,
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CallLoweringInfo &Info) const override;
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/// Returns true if the call can be lowered as a tail call.
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bool
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isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder,
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CallLoweringInfo &Info,
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SmallVectorImpl<ArgInfo> &InArgs,
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SmallVectorImpl<ArgInfo> &OutArgs) const;
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bool supportSwiftError() const override { return true; }
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private:
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using RegHandler = std::function<void(MachineIRBuilder &, Type *, unsigned,
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CCValAssign &)>;
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using MemHandler =
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std::function<void(MachineIRBuilder &, int, CCValAssign &)>;
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void splitToValueTypes(const ArgInfo &OrigArgInfo,
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SmallVectorImpl<ArgInfo> &SplitArgs,
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const DataLayout &DL, MachineRegisterInfo &MRI,
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CallingConv::ID CallConv) const;
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bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info,
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SmallVectorImpl<ArgInfo> &OutArgs) const;
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bool
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doCallerAndCalleePassArgsTheSameWay(CallLoweringInfo &Info,
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MachineFunction &MF,
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SmallVectorImpl<ArgInfo> &InArgs) const;
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bool
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areCalleeOutgoingArgsTailCallable(CallLoweringInfo &Info, MachineFunction &MF,
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SmallVectorImpl<ArgInfo> &OutArgs) const;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
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