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93 lines
2.9 KiB
93 lines
2.9 KiB
7 months ago
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/*
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* Copyright (c) Company 2018-2019. All rights reserved.
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* Description: The header file of GMAC mdio driver
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*/
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#ifndef __SOCT_GMAC_MDIO_H__
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#define __SOCT_GMAC_MDIO_H__
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#include "gmac.h"
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#define GMAC_MDIO_IO_BASE 0x10090000
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#define GMAC_MDIO_IO_SIZE 0x1000
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#define GMAC_MDIO_FRQDIV 0
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#define REG_MDIO_SINGLE_CMD 0x000003C0
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#define REG_MDIO_SINGLE_DATA 0x000003C4
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#define REG_MDIO_RDATA_STATUS 0x000003D0
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/* 0:mdio operation done, 1: start mdio operation */
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#define MDIO_CMD mk_bits(20, 1)
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#define MDIO_WR_DATA mk_bits(0, 16)
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#define MDIO_RDATA_STATUS mk_bits(0, 1)
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#define MDIO_CMD_READ 2
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#define MDIO_CMD_WRITE 1
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#define gmac_mdio_readl(ld, ofs) \
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({ unsigned int reg = readl((ld)->gmac_iobase + (ofs)); \
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gmac_trace(2, "readl(0x%04X) = 0x%08X", (ofs), reg); reg; })
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#define gmac_mdio_writel(ld, v, ofs) \
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do { writel(v, (ld)->gmac_iobase + (ofs)); \
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gmac_trace(2, "writel(0x%04X) = 0x%08X", (ofs), \
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(unsigned int)(v)); \
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} while (0)
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#define gmac_mdio_writel_bits(ld, v, ofs, bits_desc) \
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do { \
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unsigned int _bits_desc = bits_desc; \
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unsigned int _shift = (_bits_desc) >> 16; \
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unsigned int _reg = gmac_mdio_readl(ld, ofs); \
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unsigned int _mask = ((_bits_desc & 0x3F) < 32) ? \
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(((1 << (_bits_desc & 0x3F)) - 1) << (_shift)) : 0xffffffff; \
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gmac_mdio_writel(ld, (_reg & (~_mask)) \
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| (((unsigned int)(v) << (_shift)) & _mask), ofs); \
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} while (0)
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#define gmac_mdio_readl_bits(ld, ofs, bits_desc) \
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({ unsigned int _bits_desc = bits_desc; \
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unsigned int _shift = (_bits_desc) >> 16; \
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unsigned int _mask = ((_bits_desc & 0x3F) < 32) ? \
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(((1 << (_bits_desc & 0x3F)) - 1) << (_shift)) : 0xffffffff; \
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(gmac_mdio_readl(ld, ofs) & _mask) >> (_shift); })
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#define mdio_mk_rwctl(rw, phy_exaddr, phy_regnum) \
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(((0x1)<<20) | \
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(((rw)&0x3)<<16) | \
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(((phy_exaddr)&0x1f)<<8) | \
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((phy_regnum)&0x1f))
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#define mdio_start_phyread(ld, phy_addr, regnum) \
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gmac_mdio_writel(ld, \
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mdio_mk_rwctl(MDIO_CMD_READ, phy_addr, regnum), \
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REG_MDIO_SINGLE_CMD)
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#define mdio_get_phyread_val(ld) \
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(gmac_mdio_readl(ld, REG_MDIO_SINGLE_DATA) >> 16)
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#define mdio_set_phywrite_val(ld, val) \
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do { \
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unsigned int reg = 0; \
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gmac_mdio_writel_bits(ld, val, REG_MDIO_SINGLE_DATA, MDIO_WR_DATA); \
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reg = gmac_mdio_readl(ld, REG_MDIO_SINGLE_DATA); \
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gmac_trace(2, "write reg 0x%x, bits:0x%x= 0x%x, then read = 0x%x", \
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REG_MDIO_SINGLE_DATA, MDIO_WR_DATA, val, reg); \
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} while (0)
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#define mdio_phywrite(ld, phy_addr, regnum) \
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gmac_mdio_writel(ld, \
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mdio_mk_rwctl(MDIO_CMD_WRITE, phy_addr, regnum), \
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REG_MDIO_SINGLE_CMD)
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#define test_mdio_ready(ld) \
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(gmac_mdio_readl_bits((ld), REG_MDIO_SINGLE_CMD, MDIO_CMD) == 0)
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#define test_mdio_read_data_done(ld) \
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(gmac_mdio_readl_bits(ld, REG_MDIO_RDATA_STATUS, MDIO_RDATA_STATUS) \
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== 0)
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int gmac_mdio_read(struct mii_bus *bus, int phy, int reg);
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int gmac_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val);
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#endif
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