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/*
* Copyright (c) Hisilicon Technologies Co., Ltd. 2012-2020. All rights reserved.
* Description: The iapi interfaces of spread
*/
#ifndef __UAPI_SPREAD_H__
#define __UAPI_SPREAD_H__
#include "td_type.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */
/* ******************************Structure declaration **************************** */
/* * \addtogroup SPREAD */
/* * @{ */ /* * <!-- [SPREAD] */
/* * @} */ /* * <!-- ==== Structure Definition end ==== */
/* ****************************** API declaration **************************** */
/* * \addtogroup SPREAD */
/* * @{ */ /* * <!-- [SPREAD] */
/* *
\brief Open/close the ddr spread.
CNcomment:\brief /DDRCNend
\attention \n
N/A
\param[in] enable ddr spread enable control CNcomment: DDR使 CNend
\retval ::TD_FAILURE set failure. CNcomment: CNend
\retval ::TD_SUCCESS set success. CNcomment: CNend
\see \n
N/A
*/
td_s32 uapi_ss_ddr_set_spread(td_bool enable);
/* *
\brief Set the ddr spreadratio.
CNcomment:\brief DDRCNend
\attention \n
The ddr spreadratio range[0-31] 0; 0.1%; 0.2%; 0.3%; 0.4%; 0.5%; 0.6%; 0.7%...3.1%; \n
CNcomment: DDR[0-31] 0; 0.1%; 0.2%; 0.3%; 0.4%; 0.5%; 0.6%; 0.7%...3.1%; CNend
\param[in] ratio ddr spreadratio value CNcomment: CNend
\retval ::TD_FAILURE set failure. CNcomment: CNend
\retval ::TD_SUCCESS set success. CNcomment: CNend
\see \n
N/A
*/
td_s32 uapi_ss_ddr_set_spread_ratio(td_u32 ratio);
/* *
\brief Set the ddr spreadfrequency.
CNcomment:\brief DDRCNend
\attention \n
The ddr spreadfrequency range[2-5] 93KHZ; 62KHZ; 46KHZ; 37KHZ; 31KHZ; \n
CNcomment: DDR[2-5] 93KHZ; 62KHZ; 46KHZ; 37KHZ; 31KHZ; CNend
\param[in] freq ddr spreadfrequency value CNcomment: CNend
\retval ::TD_FAILURE set failure. CNcomment: CNend
\retval ::TD_SUCCESS set success. CNcomment: CNend
\see \n
N/A
*/
td_s32 uapi_ss_ddr_set_spread_freq(td_u32 freq);
/* *
\briefa Open/close the emmc clock, Undo reset/reset.
CNcomment:\brief /EMMC/CNend
\attention \n
N/A
\param[in] enable emmc clock/reset enable control CNcomment: EMMC/使 CNend
\retval ::TD_FAILURE set failure. CNcomment: CNend
\retval ::TD_SUCCESS set success. CNcomment: CNend
\see \n
N/A
*/
td_s32 uapi_ss_emmc_set_clock(td_bool enable);
/* *
\brief Open/close the emmc spread.
CNcomment:\brief /EMMCCNend
\attention \n
N/A
\param[in] enable emmc spread enable control CNcomment: EMMC使 CNend
\retval ::TD_FAILURE set failure. CNcomment: CNend
\retval ::TD_SUCCESS set success. CNcomment: CNend
\see \n
N/A
*/
td_s32 uapi_ss_emmc_set_spread(td_bool enable);
/* *
\brief Set the emmc spreadratio.
CNcomment:\brief EMMCCNend
\attention \n
The emmc spreadratio range[0-31] 0; 0.1%; 0.2%; 0.3%; 0.4%; 0.5%; 0.6%; 0.7%...3.1%; \n
CNcomment: EMMC[0-31] 0; 0.1%; 0.2%; 0.3%; 0.4%; 0.5%; 0.6%; 0.7%...3.1%; CNend
\param[in] ratio emmc spreadratio value CNcomment: CNend
\retval ::TD_FAILURE set failure. CNcomment: CNend
\retval ::TD_SUCCESS set success. CNcomment: CNend
\see \n
N/A
*/
td_s32 uapi_ss_emmc_set_spread_ratio(td_u32 ratio);
/* *
\brief Set the emmc spreadfrequency.
CNcomment:\brief EMMCCNend
\attention \n
The emmc spreadfrequency range[2-5] 93KHZ; 62KHZ; 46KHZ; 37KHZ; 31KHZ; \n
CNcomment:EMMC[2-5] 93KHZ; 62KHZ; 46KHZ; 37KHZ; 31KHZ; CNend
\param[in] freq emmc spreadfrequency value CNcomment: CNend
\retval ::TD_FAILURE set failure. CNcomment: CNend
\retval ::TD_SUCCESS set success. CNcomment: CNend
\see \n
N/A
*/
td_s32 uapi_ss_emmc_set_spread_freq(td_u32 freq);
/* *
\briefa Open/close the gmac clock, Undo reset/reset.
CNcomment:\brief /GMAC/CNend
\attention \n
N/A
\param[in] enable gmac clock/reset enable control CNcomment: GMAC/使 CNend
\retval ::TD_FAILURE set failure. CNcomment: CNend
\retval ::TD_SUCCESS set success. CNcomment: CNend
\see \n
N/A
*/
td_s32 uapi_ss_gmac_set_clock(td_bool enable);
/* *
\brief Open/close the gmac spread.
CNcomment:\brief /GMACCNend
\attention \n
N/A
\param[in] enable gmac spread enable control CNcomment: GMAC使 CNend
\retval ::TD_FAILURE set failure. CNcomment: CNend
\retval ::TD_SUCCESS set success. CNcomment: CNend
\see \n
N/A
*/
td_s32 uapi_ss_gmac_set_spread(td_bool enable);
/* *
\brief Set the gmac spreadratio.
CNcomment:\brief GMACCNend
\attention \n
The gmac spreadratio range[0-31] 0; 0.1%; 0.2%; 0.3%; 0.4%; 0.5%; 0.6%; 0.7%...3.1%; \n
CNcomment: GMAC[0-31] 0; 0.1%; 0.2%; 0.3%; 0.4%; 0.5%; 0.6%; 0.7%...3.1%; CNend
\param[in] ratio gmac spreadratio value CNcomment: CNend
\retval ::TD_FAILURE set failure. CNcomment: CNend
\retval ::TD_SUCCESS set success. CNcomment: CNend
\see \n
N/A
*/
td_s32 uapi_ss_gmac_set_spread_ratio(td_u32 ratio);
/* *
\brief Set the gmac spreadfrequency.
CNcomment:\brief GMACCNend
\attention \n
The gmac spreadfrequency range[2-5] 93KHZ; 62KHZ; 46KHZ; 37KHZ; 31KHZ; \n
CNcomment: GMAC[2-5] 93KHZ; 62KHZ; 46KHZ; 37KHZ; 31KHZ; CNend
\param[in] freq gmac spreadfrequency value CNcomment: CNend
\retval ::TD_FAILURE set failure. CNcomment: CNend
\retval ::TD_SUCCESS set success. CNcomment: CNend
\see \n
N/A
*/
td_s32 uapi_ss_gmac_set_spread_freq(td_u32 freq);
/* *
\briefa Open/close the ci clock, Undo reset/reset.
CNcomment:\brief /CI/CNend
\attention \n
N/A
\param[in] enable ci clock/reset enable control CNcomment: CI/使 CNend
\retval ::TD_FAILURE set failure. CNcomment: CNend
\retval ::TD_SUCCESS set success. CNcomment: CNend
\see \n
N/A
*/
td_s32 uapi_ci_set_clock(td_bool enable);
/* * @} */ /* * <!-- ==== API declaration end ==== */
#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */
#endif /* __UAPI_SPREAD_H__ */