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294 lines
6.9 KiB
294 lines
6.9 KiB
4 months ago
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#
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# Copyright (c) 2019-2020, Broadcom
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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# Set the toc_flags to 1 for 100% speed operation
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# Set the toc_flags to 2 for 50% speed operation
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# Set the toc_flags to 3 for 25% speed operation
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# Set the toc_flags bit 3 to indicate ignore the fip in UEFI copy mode
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PLAT_TOC_FLAGS := 0x0
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# Set the IHOST_PLL_FREQ to,
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# 1 for full speed
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# 2 for 50% speed
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# 3 for 25% speed
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# 0 for bypass
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$(eval $(call add_define_val,IHOST_PLL_FREQ,1))
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# Enable workaround for ERRATA_A72_859971
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ERRATA_A72_859971 := 1
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# Cache Coherency Interconnect Driver needed
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DRIVER_CC_ENABLE := 1
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$(eval $(call add_define,DRIVER_CC_ENABLE))
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# Enable to erase eMMC
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INCLUDE_EMMC_DRIVER_ERASE_CODE := 0
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ifeq (${INCLUDE_EMMC_DRIVER_ERASE_CODE},1)
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$(eval $(call add_define,INCLUDE_EMMC_DRIVER_ERASE_CODE))
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endif
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# BL31 is in DRAM
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ARM_BL31_IN_DRAM := 1
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ifneq (${USE_EMULATOR},yes)
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STINGRAY_EMULATION_SETUP := 0
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ifeq (${FASTBOOT_TYPE},)
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override FASTBOOT_TYPE := 0
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endif
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USE_PAXB := yes
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USE_PAXC := yes
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USE_CHIMP := yes
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endif
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USE_CRMU_SRAM := yes
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# Disable FS4 clocks - they can be reenabled when needed by linux
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FS4_DISABLE_CLOCK := yes
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# Enable error logging by default for Stingray
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BCM_ELOG := yes
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# Enable FRU support by default for Stingray
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ifeq (${USE_FRU},)
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USE_FRU := no
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endif
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# Use single cluster
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ifeq (${USE_SINGLE_CLUSTER},yes)
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$(info Using Single Cluster)
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$(eval $(call add_define,USE_SINGLE_CLUSTER))
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endif
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# Use DDR
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ifeq (${USE_DDR},yes)
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$(info Using DDR)
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$(eval $(call add_define,USE_DDR))
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endif
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ifeq (${BOARD_CFG},)
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BOARD_CFG := bcm958742t
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endif
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# Use PAXB
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ifeq (${USE_PAXB},yes)
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$(info Using PAXB)
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$(eval $(call add_define,USE_PAXB))
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endif
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# Use FS4
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ifeq (${USE_FS4},yes)
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$(info Using FS4)
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$(eval $(call add_define,USE_FS4))
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endif
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# Use FS6
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ifeq (${USE_FS6},yes)
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$(info Using FS6)
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$(eval $(call add_define,USE_FS6))
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endif
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# Disable FS4 clock
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ifeq (${FS4_DISABLE_CLOCK},yes)
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$(info Using FS4_DISABLE_CLOCK)
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$(eval $(call add_define,FS4_DISABLE_CLOCK))
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endif
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ifneq (${NCSI_IO_DRIVE_STRENGTH_MA},)
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$(info Using NCSI_IO_DRIVE_STRENGTH_MA)
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$(eval $(call add_define,NCSI_IO_DRIVE_STRENGTH_MA))
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endif
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# Use NAND
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ifeq (${USE_NAND},$(filter yes, ${USE_NAND}))
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$(info Using NAND)
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$(eval $(call add_define,USE_NAND))
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endif
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# Enable Broadcom error logging support
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ifeq (${BCM_ELOG},yes)
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$(info Using BCM_ELOG)
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$(eval $(call add_define,BCM_ELOG))
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endif
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# BL31 build for standalone mode
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ifeq (${STANDALONE_BL31},yes)
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RESET_TO_BL31 := 1
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$(info Using RESET_TO_BL31)
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endif
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# BL31 force full frequency for all CPUs
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ifeq (${BL31_FORCE_CPU_FULL_FREQ},yes)
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$(info Using BL31_FORCE_CPU_FULL_FREQ)
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$(eval $(call add_define,BL31_FORCE_CPU_FULL_FREQ))
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endif
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# Enable non-secure accesses to CCN registers
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ifeq (${BL31_CCN_NONSECURE},yes)
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$(info Using BL31_CCN_NONSECURE)
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$(eval $(call add_define,BL31_CCN_NONSECURE))
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endif
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# Use ChiMP
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ifeq (${USE_CHIMP},yes)
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$(info Using ChiMP)
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$(eval $(call add_define,USE_CHIMP))
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endif
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# Use PAXC
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ifeq (${USE_PAXC},yes)
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$(info Using PAXC)
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$(eval $(call add_define,USE_PAXC))
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ifeq (${CHIMPFW_USE_SIDELOAD},yes)
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$(info Using ChiMP FW sideload)
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$(eval $(call add_define,CHIMPFW_USE_SIDELOAD))
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endif
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$(eval $(call add_define,FASTBOOT_TYPE))
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$(eval $(call add_define,CHIMP_FB1_ENTRY))
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endif
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ifeq (${DEFAULT_SWREG_CONFIG}, 1)
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$(eval $(call add_define,DEFAULT_SWREG_CONFIG))
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endif
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ifeq (${CHIMP_ALWAYS_NEEDS_QSPI},yes)
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$(eval $(call add_define,CHIMP_ALWAYS_NEEDS_QSPI))
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endif
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# For testing purposes, use memsys stubs. Remove once memsys is fully tested.
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USE_MEMSYS_STUBS := yes
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# Default, use BL1_RW area
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ifneq (${BL2_USE_BL1_RW},no)
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$(eval $(call add_define,USE_BL1_RW))
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endif
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# Default soft reset is L3
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$(eval $(call add_define,CONFIG_SOFT_RESET_L3))
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# Enable Chip OTP driver
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DRIVER_OCOTP_ENABLE := 1
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ifneq (${WARMBOOT_DDR_S3_SUPPORT},)
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DRIVER_SPI_ENABLE := 1
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endif
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include plat/brcm/board/common/board_common.mk
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SOC_DIR := brcm/board/stingray
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PLAT_INCLUDES += -Iplat/${SOC_DIR}/include/ \
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-Iinclude/plat/brcm/common/ \
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-Iplat/brcm/common/
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PLAT_BL_COMMON_SOURCES += lib/cpus/aarch64/cortex_a72.S \
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plat/${SOC_DIR}/aarch64/plat_helpers.S \
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drivers/ti/uart/aarch64/16550_console.S \
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plat/${SOC_DIR}/src/tz_sec.c \
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drivers/arm/tzc/tzc400.c \
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plat/${SOC_DIR}/driver/plat_emmc.c \
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plat/${SOC_DIR}/src/topology.c
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ifeq (${USE_CHIMP},yes)
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PLAT_BL_COMMON_SOURCES += drivers/brcm/chimp.c
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endif
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BL2_SOURCES += plat/${SOC_DIR}/driver/ihost_pll_config.c \
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plat/${SOC_DIR}/src/bl2_setup.c \
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plat/${SOC_DIR}/driver/swreg.c
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ifeq (${USE_DDR},yes)
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PLAT_INCLUDES += -Iplat/${SOC_DIR}/driver/ddr/soc/include
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else
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PLAT_INCLUDES += -Iplat/${SOC_DIR}/driver/ext_sram_init
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BL2_SOURCES += plat/${SOC_DIR}/driver/ext_sram_init/ext_sram_init.c
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endif
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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BRCM_GIC_SOURCES := ${GICV3_SOURCES} \
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plat/common/plat_gicv3.c \
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plat/brcm/common/brcm_gicv3.c
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BL31_SOURCES += \
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drivers/arm/ccn/ccn.c \
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plat/brcm/board/common/timer_sync.c \
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plat/brcm/common/brcm_ccn.c \
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plat/common/plat_psci_common.c \
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plat/${SOC_DIR}/driver/ihost_pll_config.c \
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plat/${SOC_DIR}/src/bl31_setup.c \
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plat/${SOC_DIR}/src/fsx.c \
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plat/${SOC_DIR}/src/iommu.c \
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plat/${SOC_DIR}/src/sdio.c \
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${BRCM_GIC_SOURCES}
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ifneq (${NCSI_IO_DRIVE_STRENGTH_MA},)
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BL31_SOURCES += plat/${SOC_DIR}/src/ncsi.c
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endif
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ifeq (${USE_PAXB},yes)
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BL31_SOURCES += plat/${SOC_DIR}/src/paxb.c
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BL31_SOURCES += plat/${SOC_DIR}/src/sr_paxb_phy.c
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endif
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ifeq (${USE_PAXC},yes)
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BL31_SOURCES += plat/${SOC_DIR}/src/paxc.c
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endif
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ifdef SCP_BL2
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PLAT_INCLUDES += -Iplat/brcm/common/
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BL2_SOURCES += plat/brcm/common/brcm_mhu.c \
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plat/brcm/common/brcm_scpi.c \
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plat/${SOC_DIR}/src/scp_utils.c \
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plat/${SOC_DIR}/src/scp_cmd.c \
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drivers/brcm/scp.c
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BL31_SOURCES += plat/brcm/common/brcm_mhu.c \
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plat/brcm/common/brcm_scpi.c \
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plat/${SOC_DIR}/src/brcm_pm_ops.c
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else
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BL31_SOURCES += plat/${SOC_DIR}/src/ihost_pm.c \
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plat/${SOC_DIR}/src/pm.c
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endif
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ifeq (${ELOG_SUPPORT},1)
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ifeq (${ELOG_STORE_MEDIA},DDR)
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BL2_SOURCES += plat/brcm/board/common/bcm_elog_ddr.c
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endif
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endif
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ifeq (${BL31_BOOT_PRELOADED_SCP}, 1)
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ifdef SCP_BL2
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SCP_CFG_DIR=$(dir ${SCP_BL2})
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PLAT_INCLUDES += -I${SCP_CFG_DIR}
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endif
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PLAT_INCLUDES += -Iplat/brcm/common/
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# By default use OPTEE Assigned memory
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PRELOADED_SCP_BASE ?= 0x8E000000
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PRELOADED_SCP_SIZE ?= 0x10000
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$(eval $(call add_define,PRELOADED_SCP_BASE))
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$(eval $(call add_define,PRELOADED_SCP_SIZE))
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$(eval $(call add_define,BL31_BOOT_PRELOADED_SCP))
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BL31_SOURCES += plat/${SOC_DIR}/src/scp_utils.c \
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plat/${SOC_DIR}/src/scp_cmd.c \
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drivers/brcm/scp.c
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endif
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# Do not execute the startup code on warm reset.
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PROGRAMMABLE_RESET_ADDRESS := 1
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# Nitro FW, config and Crash log uses secure DDR memory
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# Inaddition to above, Nitro master and slave is also secure
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ifneq ($(NITRO_SECURE_ACCESS),)
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$(eval $(call add_define,NITRO_SECURE_ACCESS))
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$(eval $(call add_define,DDR_NITRO_SECURE_REGION_START))
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$(eval $(call add_define,DDR_NITRO_SECURE_REGION_END))
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endif
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