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66 lines
1.8 KiB
66 lines
1.8 KiB
4 months ago
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/*
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* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef SECURE_H
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#define SECURE_H
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/***************************************************************************
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* SGRF
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***************************************************************************/
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#define SGRF_SOC_CON(i) ((i) * 0x4)
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#define SGRF_DMAC_CON(i) (0x30 + (i) * 0x4)
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#define SGRF_MST_S_ALL_NS 0xffffffff
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#define SGRF_SLV_S_ALL_NS 0xffff0000
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#define DMA_IRQ_BOOT_NS 0xffffffff
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#define DMA_PERI_CH_NS_15_0 0xffffffff
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#define DMA_PERI_CH_NS_19_16 0x000f000f
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#define DMA_MANAGER_BOOT_NS 0x00010001
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#define DMA_SOFTRST_REQ BITS_WITH_WMASK(1, 0x1, 12)
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#define DMA_SOFTRST_RLS BITS_WITH_WMASK(0, 0x1, 12)
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/***************************************************************************
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* DDR FIREWALL
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***************************************************************************/
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#define FIREWALL_DDR_FW_DDR_RGN(i) ((i) * 0x4)
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#define FIREWALL_DDR_FW_DDR_MST(i) (0x20 + (i) * 0x4)
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#define FIREWALL_DDR_FW_DDR_CON_REG 0x40
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#define FIREWALL_DDR_FW_DDR_RGN_NUM 8
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#define FIREWALL_DDR_FW_DDR_MST_NUM 6
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#define PLAT_MAX_DDR_CAPACITY_MB 4096
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#define RG_MAP_SECURE(top, base) ((((top) - 1) << 16) | (base))
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/**************************************************
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* secure timer
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**************************************************/
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/* chanal0~5 */
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#define STIMER_CHN_BASE(n) (STIME_BASE + 0x20 * (n))
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#define TIMER_LOAD_COUNT0 0x0
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#define TIMER_LOAD_COUNT1 0x4
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#define TIMER_CUR_VALUE0 0x8
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#define TIMER_CUR_VALUE1 0xc
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#define TIMER_CONTROL_REG 0x10
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#define TIMER_INTSTATUS 0x18
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#define TIMER_DIS 0x0
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#define TIMER_EN 0x1
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#define TIMER_FMODE (0x0 << 1)
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#define TIMER_RMODE (0x1 << 1)
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#define TIMER_LOAD_COUNT0_MSK (0xffffffff)
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#define TIMER_LOAD_COUNT1_MSK (0xffffffff00000000)
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void secure_timer_init(void);
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void sgrf_init(void);
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#endif /* SECURE_H */
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