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79 lines
1.8 KiB
79 lines
1.8 KiB
4 months ago
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/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <common/runtime_svc.h>
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#include <lib/mmio.h>
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#include <cdn_dp.h>
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#include <dfs.h>
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#include <plat_sip_calls.h>
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#include <rockchip_sip_svc.h>
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#define RK_SIP_DDR_CFG 0x82000008
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#define DRAM_INIT 0x00
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#define DRAM_SET_RATE 0x01
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#define DRAM_ROUND_RATE 0x02
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#define DRAM_SET_AT_SR 0x03
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#define DRAM_GET_BW 0x04
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#define DRAM_GET_RATE 0x05
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#define DRAM_CLR_IRQ 0x06
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#define DRAM_SET_PARAM 0x07
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#define DRAM_SET_ODT_PD 0x08
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#define RK_SIP_HDCP_CONTROL 0x82000009
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#define RK_SIP_HDCP_KEY_DATA64 0xC200000A
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uint32_t ddr_smc_handler(uint64_t arg0, uint64_t arg1,
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uint64_t id, uint64_t arg2)
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{
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switch (id) {
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case DRAM_SET_RATE:
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return ddr_set_rate((uint32_t)arg0);
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case DRAM_ROUND_RATE:
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return ddr_round_rate((uint32_t)arg0);
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case DRAM_GET_RATE:
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return ddr_get_rate();
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case DRAM_SET_ODT_PD:
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dram_set_odt_pd(arg0, arg1, arg2);
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break;
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default:
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break;
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}
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return 0;
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}
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uintptr_t rockchip_plat_sip_handler(uint32_t smc_fid,
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u_register_t x1,
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u_register_t x2,
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u_register_t x3,
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u_register_t x4,
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void *cookie,
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void *handle,
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u_register_t flags)
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{
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#ifdef PLAT_RK_DP_HDCP
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uint64_t x5, x6;
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#endif
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switch (smc_fid) {
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case RK_SIP_DDR_CFG:
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SMC_RET1(handle, ddr_smc_handler(x1, x2, x3, x4));
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#ifdef PLAT_RK_DP_HDCP
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case RK_SIP_HDCP_CONTROL:
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SMC_RET1(handle, dp_hdcp_ctrl(x1));
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case RK_SIP_HDCP_KEY_DATA64:
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x5 = read_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X5);
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x6 = read_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X6);
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SMC_RET1(handle, dp_hdcp_store_key(x1, x2, x3, x4, x5, x6));
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#endif
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default:
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ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
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SMC_RET1(handle, SMC_UNK);
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}
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}
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