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125 lines
4.8 KiB
125 lines
4.8 KiB
4 months ago
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/*
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef TLKD_PRIVATE_H
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#define TLKD_PRIVATE_H
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#include <platform_def.h>
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#include <arch.h>
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#include <bl31/interrupt_mgmt.h>
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#include <context.h>
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#include <lib/psci/psci.h>
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/*
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* This flag is used by the TLKD to determine if the SP is servicing a yielding
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* SMC request prior to programming the next entry into the SP e.g. if SP
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* execution is preempted by a non-secure interrupt and handed control to the
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* normal world. If another request which is distinct from what the SP was
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* previously doing arrives, then this flag will be help the TLKD to either
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* reject the new request or service it while ensuring that the previous context
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* is not corrupted.
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*/
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#define YIELD_SMC_ACTIVE_FLAG_SHIFT 2
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#define YIELD_SMC_ACTIVE_FLAG_MASK 1
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#define get_yield_smc_active_flag(state) \
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(((state) >> YIELD_SMC_ACTIVE_FLAG_SHIFT) \
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& YIELD_SMC_ACTIVE_FLAG_MASK)
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#define set_yield_smc_active_flag(state) ((state) |= \
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(1 << YIELD_SMC_ACTIVE_FLAG_SHIFT))
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#define clr_yield_smc_active_flag(state) ((state) &= \
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~(YIELD_SMC_ACTIVE_FLAG_MASK \
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<< YIELD_SMC_ACTIVE_FLAG_SHIFT))
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/*******************************************************************************
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* Translate virtual address received from the NS world
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******************************************************************************/
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#define TLK_TRANSLATE_NS_VADDR 4
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/*******************************************************************************
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* Secure Payload execution state information i.e. aarch32 or aarch64
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******************************************************************************/
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#define SP_AARCH32 MODE_RW_32
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#define SP_AARCH64 MODE_RW_64
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/*******************************************************************************
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* Number of cpus that the present on this platform. TODO: Rely on a topology
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* tree to determine this in the future to avoid assumptions about mpidr
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* allocation
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******************************************************************************/
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#define TLKD_CORE_COUNT PLATFORM_CORE_COUNT
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/*******************************************************************************
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* Constants that allow assembler code to preserve callee-saved registers of the
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* C runtime context while performing a security state switch.
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******************************************************************************/
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#define TLKD_C_RT_CTX_X19 0x0
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#define TLKD_C_RT_CTX_X20 0x8
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#define TLKD_C_RT_CTX_X21 0x10
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#define TLKD_C_RT_CTX_X22 0x18
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#define TLKD_C_RT_CTX_X23 0x20
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#define TLKD_C_RT_CTX_X24 0x28
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#define TLKD_C_RT_CTX_X25 0x30
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#define TLKD_C_RT_CTX_X26 0x38
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#define TLKD_C_RT_CTX_X27 0x40
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#define TLKD_C_RT_CTX_X28 0x48
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#define TLKD_C_RT_CTX_X29 0x50
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#define TLKD_C_RT_CTX_X30 0x58
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#define TLKD_C_RT_CTX_SIZE 0x60
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#define TLKD_C_RT_CTX_ENTRIES (TLKD_C_RT_CTX_SIZE >> DWORD_SHIFT)
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#ifndef __ASSEMBLER__
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#include <stdint.h>
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#include <lib/cassert.h>
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/* AArch64 callee saved general purpose register context structure. */
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DEFINE_REG_STRUCT(c_rt_regs, TLKD_C_RT_CTX_ENTRIES);
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/*
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* Compile time assertion to ensure that both the compiler and linker
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* have the same double word aligned view of the size of the C runtime
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* register context.
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*/
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CASSERT(TLKD_C_RT_CTX_SIZE == sizeof(c_rt_regs_t), \
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assert_tlkd_c_rt_regs_size_mismatch);
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/*******************************************************************************
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* Structure which helps the SPD to maintain the per-cpu state of the SP.
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* 'state' - collection of flags to track SP state e.g. on/off
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* 'mpidr' - mpidr to associate a context with a cpu
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* 'c_rt_ctx' - stack address to restore C runtime context from after
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* returning from a synchronous entry into the SP.
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* 'cpu_ctx' - space to maintain SP architectural state
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* 'saved_tsp_args' - space to store arguments for TSP arithmetic operations
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* which will queried using the TSP_GET_ARGS SMC by TSP.
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******************************************************************************/
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typedef struct tlk_context {
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uint32_t state;
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uint64_t mpidr;
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uint64_t c_rt_ctx;
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cpu_context_t cpu_ctx;
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} tlk_context_t;
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/*******************************************************************************
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* Function & Data prototypes
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******************************************************************************/
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uint64_t tlkd_va_translate(uintptr_t va, int type);
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uint64_t tlkd_enter_sp(uint64_t *c_rt_ctx);
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void __dead2 tlkd_exit_sp(uint64_t c_rt_ctx, uint64_t ret);
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uint64_t tlkd_synchronous_sp_entry(tlk_context_t *tlk_ctx);
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void __dead2 tlkd_synchronous_sp_exit(tlk_context_t *tlk_ctx,
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uint64_t ret);
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void tlkd_init_tlk_ep_state(struct entry_point_info *tlk_entry_point,
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uint32_t rw,
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uint64_t pc,
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tlk_context_t *tlk_ctx);
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#endif /*__ASSEMBLER__*/
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#endif /* TLKD_PRIVATE_H */
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