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502 lines
18 KiB
502 lines
18 KiB
4 months ago
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//===--- AArch64.cpp - AArch64 (not ARM) Helpers for Tools ------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "AArch64.h"
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#include "clang/Driver/Driver.h"
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#include "clang/Driver/DriverDiagnostic.h"
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#include "clang/Driver/Options.h"
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#include "llvm/Option/ArgList.h"
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#include "llvm/Support/TargetParser.h"
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#include "llvm/Support/Host.h"
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using namespace clang::driver;
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using namespace clang::driver::tools;
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using namespace clang;
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using namespace llvm::opt;
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/// \returns true if the given triple can determine the default CPU type even
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/// if -arch is not specified.
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static bool isCPUDeterminedByTriple(const llvm::Triple &Triple) {
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return Triple.isOSDarwin();
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}
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/// getAArch64TargetCPU - Get the (LLVM) name of the AArch64 cpu we are
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/// targeting. Set \p A to the Arg corresponding to the -mcpu argument if it is
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/// provided, or to nullptr otherwise.
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std::string aarch64::getAArch64TargetCPU(const ArgList &Args,
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const llvm::Triple &Triple, Arg *&A) {
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std::string CPU;
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// If we have -mcpu, use that.
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if ((A = Args.getLastArg(options::OPT_mcpu_EQ))) {
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StringRef Mcpu = A->getValue();
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CPU = Mcpu.split("+").first.lower();
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}
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// Handle CPU name is 'native'.
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if (CPU == "native")
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return std::string(llvm::sys::getHostCPUName());
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// arm64e requires v8.3a and only runs on apple-a12 and later CPUs.
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if (Triple.isArm64e())
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return "apple-a12";
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if (CPU.size())
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return CPU;
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if (Triple.isTargetMachineMac() &&
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Triple.getArch() == llvm::Triple::aarch64) {
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// Apple Silicon macs default to A12 CPUs.
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return "apple-a12";
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}
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// Make sure we pick the appropriate Apple CPU if -arch is used or when
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// targetting a Darwin OS.
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if (Args.getLastArg(options::OPT_arch) || Triple.isOSDarwin())
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return Triple.getArch() == llvm::Triple::aarch64_32 ? "apple-s4"
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: "apple-a7";
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return "generic";
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}
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// Decode AArch64 features from string like +[no]featureA+[no]featureB+...
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static bool DecodeAArch64Features(const Driver &D, StringRef text,
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std::vector<StringRef> &Features,
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llvm::AArch64::ArchKind ArchKind) {
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SmallVector<StringRef, 8> Split;
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text.split(Split, StringRef("+"), -1, false);
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for (StringRef Feature : Split) {
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StringRef FeatureName = llvm::AArch64::getArchExtFeature(Feature);
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if (!FeatureName.empty())
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Features.push_back(FeatureName);
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else if (Feature == "neon" || Feature == "noneon")
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D.Diag(clang::diag::err_drv_no_neon_modifier);
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else
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return false;
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// +sve implies +f32mm if the base architecture is v8.6A
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// it isn't the case in general that sve implies both f64mm and f32mm
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if ((ArchKind == llvm::AArch64::ArchKind::ARMV8_6A) && Feature == "sve")
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Features.push_back("+f32mm");
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}
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return true;
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}
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// Check if the CPU name and feature modifiers in -mcpu are legal. If yes,
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// decode CPU and feature.
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static bool DecodeAArch64Mcpu(const Driver &D, StringRef Mcpu, StringRef &CPU,
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std::vector<StringRef> &Features) {
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std::pair<StringRef, StringRef> Split = Mcpu.split("+");
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CPU = Split.first;
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llvm::AArch64::ArchKind ArchKind = llvm::AArch64::ArchKind::ARMV8A;
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if (CPU == "native")
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CPU = llvm::sys::getHostCPUName();
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if (CPU == "generic") {
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Features.push_back("+neon");
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} else {
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ArchKind = llvm::AArch64::parseCPUArch(CPU);
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if (!llvm::AArch64::getArchFeatures(ArchKind, Features))
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return false;
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uint64_t Extension = llvm::AArch64::getDefaultExtensions(CPU, ArchKind);
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if (!llvm::AArch64::getExtensionFeatures(Extension, Features))
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return false;
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}
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if (Split.second.size() &&
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!DecodeAArch64Features(D, Split.second, Features, ArchKind))
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return false;
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return true;
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}
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static bool
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getAArch64ArchFeaturesFromMarch(const Driver &D, StringRef March,
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const ArgList &Args,
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std::vector<StringRef> &Features) {
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std::string MarchLowerCase = March.lower();
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std::pair<StringRef, StringRef> Split = StringRef(MarchLowerCase).split("+");
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llvm::AArch64::ArchKind ArchKind = llvm::AArch64::parseArch(Split.first);
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if (ArchKind == llvm::AArch64::ArchKind::INVALID ||
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!llvm::AArch64::getArchFeatures(ArchKind, Features) ||
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(Split.second.size() &&
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!DecodeAArch64Features(D, Split.second, Features, ArchKind)))
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return false;
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return true;
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}
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static bool
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getAArch64ArchFeaturesFromMcpu(const Driver &D, StringRef Mcpu,
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const ArgList &Args,
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std::vector<StringRef> &Features) {
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StringRef CPU;
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std::string McpuLowerCase = Mcpu.lower();
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if (!DecodeAArch64Mcpu(D, McpuLowerCase, CPU, Features))
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return false;
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return true;
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}
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static bool
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getAArch64MicroArchFeaturesFromMtune(const Driver &D, StringRef Mtune,
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const ArgList &Args,
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std::vector<StringRef> &Features) {
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std::string MtuneLowerCase = Mtune.lower();
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// Check CPU name is valid
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std::vector<StringRef> MtuneFeatures;
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StringRef Tune;
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if (!DecodeAArch64Mcpu(D, MtuneLowerCase, Tune, MtuneFeatures))
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return false;
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// Handle CPU name is 'native'.
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if (MtuneLowerCase == "native")
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MtuneLowerCase = std::string(llvm::sys::getHostCPUName());
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if (MtuneLowerCase == "cyclone" ||
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StringRef(MtuneLowerCase).startswith("apple")) {
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Features.push_back("+zcm");
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Features.push_back("+zcz");
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}
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return true;
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}
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static bool
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getAArch64MicroArchFeaturesFromMcpu(const Driver &D, StringRef Mcpu,
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const ArgList &Args,
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std::vector<StringRef> &Features) {
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StringRef CPU;
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std::vector<StringRef> DecodedFeature;
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std::string McpuLowerCase = Mcpu.lower();
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if (!DecodeAArch64Mcpu(D, McpuLowerCase, CPU, DecodedFeature))
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return false;
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return getAArch64MicroArchFeaturesFromMtune(D, CPU, Args, Features);
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}
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void aarch64::getAArch64TargetFeatures(const Driver &D,
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const llvm::Triple &Triple,
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const ArgList &Args,
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std::vector<StringRef> &Features) {
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Arg *A;
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bool success = true;
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// Enable NEON by default.
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Features.push_back("+neon");
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if ((A = Args.getLastArg(options::OPT_march_EQ)))
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success = getAArch64ArchFeaturesFromMarch(D, A->getValue(), Args, Features);
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else if ((A = Args.getLastArg(options::OPT_mcpu_EQ)))
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success = getAArch64ArchFeaturesFromMcpu(D, A->getValue(), Args, Features);
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else if (Args.hasArg(options::OPT_arch) || isCPUDeterminedByTriple(Triple))
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success = getAArch64ArchFeaturesFromMcpu(
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D, getAArch64TargetCPU(Args, Triple, A), Args, Features);
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if (success && (A = Args.getLastArg(clang::driver::options::OPT_mtune_EQ)))
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success =
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getAArch64MicroArchFeaturesFromMtune(D, A->getValue(), Args, Features);
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else if (success && (A = Args.getLastArg(options::OPT_mcpu_EQ)))
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success =
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getAArch64MicroArchFeaturesFromMcpu(D, A->getValue(), Args, Features);
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else if (success &&
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(Args.hasArg(options::OPT_arch) || isCPUDeterminedByTriple(Triple)))
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success = getAArch64MicroArchFeaturesFromMcpu(
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D, getAArch64TargetCPU(Args, Triple, A), Args, Features);
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if (!success)
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D.Diag(diag::err_drv_clang_unsupported) << A->getAsString(Args);
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if (Args.getLastArg(options::OPT_mgeneral_regs_only)) {
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Features.push_back("-fp-armv8");
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Features.push_back("-crypto");
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Features.push_back("-neon");
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}
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if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
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StringRef Mtp = A->getValue();
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if (Mtp == "el3")
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Features.push_back("+tpidr-el3");
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else if (Mtp == "el2")
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Features.push_back("+tpidr-el2");
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else if (Mtp == "el1")
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Features.push_back("+tpidr-el1");
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else if (Mtp != "el0")
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D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args);
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}
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// Enable/disable straight line speculation hardening.
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if (Arg *A = Args.getLastArg(options::OPT_mharden_sls_EQ)) {
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StringRef Scope = A->getValue();
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bool EnableRetBr = false;
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bool EnableBlr = false;
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if (Scope != "none" && Scope != "all") {
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SmallVector<StringRef, 4> Opts;
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Scope.split(Opts, ",");
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for (auto Opt : Opts) {
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Opt = Opt.trim();
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if (Opt == "retbr") {
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EnableRetBr = true;
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continue;
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}
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if (Opt == "blr") {
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EnableBlr = true;
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continue;
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}
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D.Diag(diag::err_invalid_sls_hardening)
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<< Scope << A->getAsString(Args);
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break;
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}
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} else if (Scope == "all") {
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EnableRetBr = true;
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EnableBlr = true;
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}
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if (EnableRetBr)
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Features.push_back("+harden-sls-retbr");
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if (EnableBlr)
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Features.push_back("+harden-sls-blr");
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}
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// En/disable crc
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if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) {
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if (A->getOption().matches(options::OPT_mcrc))
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Features.push_back("+crc");
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else
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Features.push_back("-crc");
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}
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// Handle (arch-dependent) fp16fml/fullfp16 relationship.
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// FIXME: this fp16fml option handling will be reimplemented after the
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// TargetParser rewrite.
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const auto ItRNoFullFP16 = std::find(Features.rbegin(), Features.rend(), "-fullfp16");
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const auto ItRFP16FML = std::find(Features.rbegin(), Features.rend(), "+fp16fml");
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if (llvm::is_contained(Features, "+v8.4a")) {
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const auto ItRFullFP16 = std::find(Features.rbegin(), Features.rend(), "+fullfp16");
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if (ItRFullFP16 < ItRNoFullFP16 && ItRFullFP16 < ItRFP16FML) {
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// Only entangled feature that can be to the right of this +fullfp16 is -fp16fml.
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// Only append the +fp16fml if there is no -fp16fml after the +fullfp16.
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if (std::find(Features.rbegin(), ItRFullFP16, "-fp16fml") == ItRFullFP16)
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Features.push_back("+fp16fml");
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}
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else
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goto fp16_fml_fallthrough;
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} else {
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fp16_fml_fallthrough:
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// In both of these cases, putting the 'other' feature on the end of the vector will
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// result in the same effect as placing it immediately after the current feature.
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if (ItRNoFullFP16 < ItRFP16FML)
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Features.push_back("-fp16fml");
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else if (ItRNoFullFP16 > ItRFP16FML)
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Features.push_back("+fullfp16");
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}
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// FIXME: this needs reimplementation too after the TargetParser rewrite
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//
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// Context sensitive meaning of Crypto:
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// 1) For Arch >= ARMv8.4a: crypto = sm4 + sha3 + sha2 + aes
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// 2) For Arch <= ARMv8.3a: crypto = sha2 + aes
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const auto ItBegin = Features.begin();
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const auto ItEnd = Features.end();
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const auto ItRBegin = Features.rbegin();
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const auto ItREnd = Features.rend();
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const auto ItRCrypto = std::find(ItRBegin, ItREnd, "+crypto");
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const auto ItRNoCrypto = std::find(ItRBegin, ItREnd, "-crypto");
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const auto HasCrypto = ItRCrypto != ItREnd;
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const auto HasNoCrypto = ItRNoCrypto != ItREnd;
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const ptrdiff_t PosCrypto = ItRCrypto - ItRBegin;
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const ptrdiff_t PosNoCrypto = ItRNoCrypto - ItRBegin;
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bool NoCrypto = false;
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if (HasCrypto && HasNoCrypto) {
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if (PosNoCrypto < PosCrypto)
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NoCrypto = true;
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}
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if (std::find(ItBegin, ItEnd, "+v8.4a") != ItEnd ||
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std::find(ItBegin, ItEnd, "+v8r") != ItEnd) {
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if (HasCrypto && !NoCrypto) {
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// Check if we have NOT disabled an algorithm with something like:
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// +crypto, -algorithm
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// And if "-algorithm" does not occur, we enable that crypto algorithm.
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const bool HasSM4 = (std::find(ItBegin, ItEnd, "-sm4") == ItEnd);
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const bool HasSHA3 = (std::find(ItBegin, ItEnd, "-sha3") == ItEnd);
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const bool HasSHA2 = (std::find(ItBegin, ItEnd, "-sha2") == ItEnd);
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const bool HasAES = (std::find(ItBegin, ItEnd, "-aes") == ItEnd);
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if (HasSM4)
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Features.push_back("+sm4");
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if (HasSHA3)
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Features.push_back("+sha3");
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if (HasSHA2)
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Features.push_back("+sha2");
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if (HasAES)
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Features.push_back("+aes");
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} else if (HasNoCrypto) {
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// Check if we have NOT enabled a crypto algorithm with something like:
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// -crypto, +algorithm
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// And if "+algorithm" does not occur, we disable that crypto algorithm.
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const bool HasSM4 = (std::find(ItBegin, ItEnd, "+sm4") != ItEnd);
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const bool HasSHA3 = (std::find(ItBegin, ItEnd, "+sha3") != ItEnd);
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const bool HasSHA2 = (std::find(ItBegin, ItEnd, "+sha2") != ItEnd);
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const bool HasAES = (std::find(ItBegin, ItEnd, "+aes") != ItEnd);
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if (!HasSM4)
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Features.push_back("-sm4");
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if (!HasSHA3)
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Features.push_back("-sha3");
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if (!HasSHA2)
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Features.push_back("-sha2");
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if (!HasAES)
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Features.push_back("-aes");
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}
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} else {
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if (HasCrypto && !NoCrypto) {
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const bool HasSHA2 = (std::find(ItBegin, ItEnd, "-sha2") == ItEnd);
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const bool HasAES = (std::find(ItBegin, ItEnd, "-aes") == ItEnd);
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if (HasSHA2)
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Features.push_back("+sha2");
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if (HasAES)
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Features.push_back("+aes");
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} else if (HasNoCrypto) {
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const bool HasSHA2 = (std::find(ItBegin, ItEnd, "+sha2") != ItEnd);
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const bool HasAES = (std::find(ItBegin, ItEnd, "+aes") != ItEnd);
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const bool HasV82a = (std::find(ItBegin, ItEnd, "+v8.2a") != ItEnd);
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const bool HasV83a = (std::find(ItBegin, ItEnd, "+v8.3a") != ItEnd);
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const bool HasV84a = (std::find(ItBegin, ItEnd, "+v8.4a") != ItEnd);
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if (!HasSHA2)
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Features.push_back("-sha2");
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if (!HasAES)
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Features.push_back("-aes");
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if (HasV82a || HasV83a || HasV84a) {
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Features.push_back("-sm4");
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Features.push_back("-sha3");
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}
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}
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}
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||
|
auto V8_6Pos = llvm::find(Features, "+v8.6a");
|
||
|
if (V8_6Pos != std::end(Features))
|
||
|
V8_6Pos = Features.insert(std::next(V8_6Pos), {"+i8mm", "+bf16"});
|
||
|
|
||
|
bool HasSve = llvm::is_contained(Features, "+sve");
|
||
|
// -msve-vector-bits=<bits> flag is valid only if SVE is enabled.
|
||
|
if (Args.hasArg(options::OPT_msve_vector_bits_EQ))
|
||
|
if (!HasSve)
|
||
|
D.Diag(diag::err_drv_invalid_sve_vector_bits);
|
||
|
|
||
|
if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
|
||
|
options::OPT_munaligned_access)) {
|
||
|
if (A->getOption().matches(options::OPT_mno_unaligned_access))
|
||
|
Features.push_back("+strict-align");
|
||
|
} else if (Triple.isOSOpenBSD())
|
||
|
Features.push_back("+strict-align");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x1))
|
||
|
Features.push_back("+reserve-x1");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x2))
|
||
|
Features.push_back("+reserve-x2");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x3))
|
||
|
Features.push_back("+reserve-x3");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x4))
|
||
|
Features.push_back("+reserve-x4");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x5))
|
||
|
Features.push_back("+reserve-x5");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x6))
|
||
|
Features.push_back("+reserve-x6");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x7))
|
||
|
Features.push_back("+reserve-x7");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x9))
|
||
|
Features.push_back("+reserve-x9");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x10))
|
||
|
Features.push_back("+reserve-x10");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x11))
|
||
|
Features.push_back("+reserve-x11");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x12))
|
||
|
Features.push_back("+reserve-x12");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x13))
|
||
|
Features.push_back("+reserve-x13");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x14))
|
||
|
Features.push_back("+reserve-x14");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x15))
|
||
|
Features.push_back("+reserve-x15");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x18))
|
||
|
Features.push_back("+reserve-x18");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x20))
|
||
|
Features.push_back("+reserve-x20");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x21))
|
||
|
Features.push_back("+reserve-x21");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x22))
|
||
|
Features.push_back("+reserve-x22");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x23))
|
||
|
Features.push_back("+reserve-x23");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x24))
|
||
|
Features.push_back("+reserve-x24");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x25))
|
||
|
Features.push_back("+reserve-x25");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x26))
|
||
|
Features.push_back("+reserve-x26");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x27))
|
||
|
Features.push_back("+reserve-x27");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x28))
|
||
|
Features.push_back("+reserve-x28");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_ffixed_x30))
|
||
|
Features.push_back("+reserve-x30");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_fcall_saved_x8))
|
||
|
Features.push_back("+call-saved-x8");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_fcall_saved_x9))
|
||
|
Features.push_back("+call-saved-x9");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_fcall_saved_x10))
|
||
|
Features.push_back("+call-saved-x10");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_fcall_saved_x11))
|
||
|
Features.push_back("+call-saved-x11");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_fcall_saved_x12))
|
||
|
Features.push_back("+call-saved-x12");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_fcall_saved_x13))
|
||
|
Features.push_back("+call-saved-x13");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_fcall_saved_x14))
|
||
|
Features.push_back("+call-saved-x14");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_fcall_saved_x15))
|
||
|
Features.push_back("+call-saved-x15");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_fcall_saved_x18))
|
||
|
Features.push_back("+call-saved-x18");
|
||
|
|
||
|
if (Args.hasArg(options::OPT_mno_neg_immediates))
|
||
|
Features.push_back("+no-neg-immediates");
|
||
|
}
|