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79 lines
2.9 KiB
79 lines
2.9 KiB
4 months ago
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//===-- SystemZ.td - Describe the SystemZ target machine -----*- tblgen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Target-independent interfaces which we are implementing
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//===----------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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//===----------------------------------------------------------------------===//
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// SystemZ subtarget features
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//===----------------------------------------------------------------------===//
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include "SystemZFeatures.td"
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//===----------------------------------------------------------------------===//
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// SystemZ subtarget scheduling models
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//===----------------------------------------------------------------------===//
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include "SystemZSchedule.td"
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//===----------------------------------------------------------------------===//
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// SystemZ supported processors
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//===----------------------------------------------------------------------===//
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include "SystemZProcessors.td"
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//===----------------------------------------------------------------------===//
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// Register file description
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//===----------------------------------------------------------------------===//
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include "SystemZRegisterInfo.td"
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//===----------------------------------------------------------------------===//
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// Calling convention description
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//===----------------------------------------------------------------------===//
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include "SystemZCallingConv.td"
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//===----------------------------------------------------------------------===//
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// Instruction descriptions
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//===----------------------------------------------------------------------===//
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include "SystemZOperators.td"
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include "SystemZOperands.td"
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include "SystemZPatterns.td"
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include "SystemZInstrFormats.td"
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include "SystemZInstrInfo.td"
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include "SystemZInstrVector.td"
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include "SystemZInstrFP.td"
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include "SystemZInstrHFP.td"
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include "SystemZInstrDFP.td"
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include "SystemZInstrSystem.td"
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def SystemZInstrInfo : InstrInfo { let guessInstructionProperties = 0; }
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//===----------------------------------------------------------------------===//
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// Assembly parser
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//===----------------------------------------------------------------------===//
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def SystemZAsmParser : AsmParser {
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let ShouldEmitMatchRegisterName = 0;
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}
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//===----------------------------------------------------------------------===//
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// Top-level target declaration
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//===----------------------------------------------------------------------===//
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def SystemZ : Target {
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let InstructionSet = SystemZInstrInfo;
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let AssemblyParsers = [SystemZAsmParser];
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let AllowRegisterRenaming = 1;
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}
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