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77 lines
2.5 KiB
77 lines
2.5 KiB
4 months ago
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
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---
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name: add_nullptr_shl_add
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: add_nullptr_shl_add
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; CHECK: liveins: $sgpr0
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
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; CHECK: $vgpr0 = COPY [[SHL]](s32)
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = G_CONSTANT i32 3
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%2:_(s32) = G_SHL %0, %1(s32)
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%3:_(p3) = G_CONSTANT i32 0
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%4:_(p3) = G_PTR_ADD %3, %2(s32)
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%5:_(s32) = G_PTRTOINT %4(p3)
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$vgpr0 = COPY %5(s32)
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...
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---
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name: add_nullptr_mul_add
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: add_nullptr_mul_add
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; CHECK: liveins: $vgpr0, $vgpr1
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY]], [[COPY1]]
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; CHECK: $vgpr0 = COPY [[MUL]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(p3) = G_CONSTANT i32 0
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%3:_(s32) = G_MUL %0:_, %1:_
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%4:_(p3) = G_PTR_ADD %2:_, %3:_(s32)
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%5:_(s32) = G_PTRTOINT %4:_(p3)
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$vgpr0 = COPY %5:_(s32)
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...
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---
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name: add_nullptr_vec_all_zero
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3
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; CHECK-LABEL: name: add_nullptr_vec_all_zero
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr3
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32)
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; CHECK: [[SHL:%[0-9]+]]:_(<2 x s32>) = G_SHL [[COPY]], [[BUILD_VECTOR]](<2 x s32>)
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; CHECK: $vgpr0_vgpr1 = COPY [[SHL]](<2 x s32>)
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%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
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%1:_(s32) = COPY $vgpr2
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%2:_(s32) = COPY $vgpr3
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%3:_(<2 x s32>) = G_BUILD_VECTOR %1:_(s32), %2:_(s32)
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%4:_(<2 x s32>) = G_SHL %0, %3(<2 x s32>)
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%5:_(p3) = G_CONSTANT i32 0
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%6:_(<2 x p3>) = G_BUILD_VECTOR %5:_(p3), %5:_(p3)
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%7:_(<2 x p3>) = G_PTR_ADD %6, %4(<2 x s32>)
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%8:_(<2 x s32>) = G_PTRTOINT %7(<2 x p3>)
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$vgpr0_vgpr1 = COPY %8(<2 x s32>)
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...
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