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117 lines
5.6 KiB
117 lines
5.6 KiB
4 months ago
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX8 %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
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# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
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# GFX6/7 selection should fail.
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# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -disable-gisel-legality-check -o - %s | FileCheck -check-prefix=GFX6 %s
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# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -disable-gisel-legality-check -o - %s | FileCheck -check-prefix=GFX6 %s
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---
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name: atomicrmw_fadd_s32_region
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX8-LABEL: name: atomicrmw_fadd_s32_region
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; GFX8: liveins: $vgpr0, $vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX8: $m0 = S_MOV_B32 -1
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; GFX8: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 0, 1, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 2)
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; GFX8: $vgpr0 = COPY [[DS_ADD_RTN_F32_]]
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; GFX9-LABEL: name: atomicrmw_fadd_s32_region
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; GFX9: liveins: $vgpr0, $vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX9: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 0, 1, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 2)
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; GFX9: $vgpr0 = COPY [[DS_ADD_RTN_F32_]]
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; GFX6-LABEL: name: atomicrmw_fadd_s32_region
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; GFX6: liveins: $vgpr0, $vgpr1
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; GFX6: [[COPY:%[0-9]+]]:vgpr(p2) = COPY $vgpr0
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; GFX6: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX6: $m0 = S_MOV_B32 -1
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; GFX6: [[ATOMICRMW_FADD:%[0-9]+]]:vgpr_32(s32) = G_ATOMICRMW_FADD [[COPY]](p2), [[COPY1]] :: (load store seq_cst 4, addrspace 2)
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; GFX6: $vgpr0 = COPY [[ATOMICRMW_FADD]](s32)
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%0:vgpr(p2) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = G_ATOMICRMW_FADD %0(p2), %1 :: (load store seq_cst 4, addrspace 2)
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$vgpr0 = COPY %2
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...
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---
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name: atomicrmw_fadd_s32_region_noret
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX8-LABEL: name: atomicrmw_fadd_s32_region_noret
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; GFX8: liveins: $vgpr0, $vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX8: $m0 = S_MOV_B32 -1
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; GFX8: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 0, 1, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 2)
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; GFX9-LABEL: name: atomicrmw_fadd_s32_region_noret
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; GFX9: liveins: $vgpr0, $vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX9: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 0, 1, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 2)
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; GFX6-LABEL: name: atomicrmw_fadd_s32_region_noret
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; GFX6: liveins: $vgpr0, $vgpr1
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; GFX6: [[COPY:%[0-9]+]]:vgpr(p2) = COPY $vgpr0
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; GFX6: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX6: $m0 = S_MOV_B32 -1
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; GFX6: [[ATOMICRMW_FADD:%[0-9]+]]:vgpr(s32) = G_ATOMICRMW_FADD [[COPY]](p2), [[COPY1]] :: (load store seq_cst 4, addrspace 2)
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%0:vgpr(p2) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = G_ATOMICRMW_FADD %0(p2), %1 :: (load store seq_cst 4, addrspace 2)
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...
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---
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name: atomicrmw_fadd_s32_region_gep4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX8-LABEL: name: atomicrmw_fadd_s32_region_gep4
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; GFX8: liveins: $vgpr0, $vgpr1
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; GFX8: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX8: $m0 = S_MOV_B32 -1
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; GFX8: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 4, 1, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 2)
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; GFX8: $vgpr0 = COPY [[DS_ADD_RTN_F32_]]
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; GFX9-LABEL: name: atomicrmw_fadd_s32_region_gep4
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; GFX9: liveins: $vgpr0, $vgpr1
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; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX9: [[DS_ADD_RTN_F32_:%[0-9]+]]:vgpr_32 = DS_ADD_RTN_F32 [[COPY]], [[COPY1]], 4, 1, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 2)
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; GFX9: $vgpr0 = COPY [[DS_ADD_RTN_F32_]]
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; GFX6-LABEL: name: atomicrmw_fadd_s32_region_gep4
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; GFX6: liveins: $vgpr0, $vgpr1
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; GFX6: [[COPY:%[0-9]+]]:vgpr(p2) = COPY $vgpr0
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; GFX6: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX6: [[C:%[0-9]+]]:vgpr(s32) = G_CONSTANT i32 4
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; GFX6: [[PTR_ADD:%[0-9]+]]:vgpr(p2) = G_PTR_ADD [[COPY]], [[C]](s32)
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; GFX6: $m0 = S_MOV_B32 -1
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; GFX6: [[ATOMICRMW_FADD:%[0-9]+]]:vgpr_32(s32) = G_ATOMICRMW_FADD [[PTR_ADD]](p2), [[COPY1]] :: (load store seq_cst 4, addrspace 2)
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; GFX6: $vgpr0 = COPY [[ATOMICRMW_FADD]](s32)
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%0:vgpr(p2) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = G_CONSTANT i32 4
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%3:vgpr(p2) = G_PTR_ADD %0, %2
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%4:vgpr(s32) = G_ATOMICRMW_FADD %3(p2), %1 :: (load store seq_cst 4, addrspace 2)
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$vgpr0 = COPY %4
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...
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