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324 lines
8.8 KiB
324 lines
8.8 KiB
4 months ago
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck -check-prefix=GCN %s
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---
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name: sext_inreg_sgpr_s32_1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: sext_inreg_sgpr_s32_1
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; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 65536, implicit-def $scc
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; GCN: $sgpr0 = COPY [[S_BFE_I32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_SEXT_INREG %0, 1
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$sgpr0 = COPY %1
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...
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---
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name: sext_inreg_sgpr_s32_2
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: sext_inreg_sgpr_s32_2
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; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 131072, implicit-def $scc
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; GCN: $sgpr0 = COPY [[S_BFE_I32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_SEXT_INREG %0, 2
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$sgpr0 = COPY %1
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...
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---
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name: sext_inreg_sgpr_s32_8
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: sext_inreg_sgpr_s32_8
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; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN: [[S_SEXT_I32_I8_:%[0-9]+]]:sreg_32 = S_SEXT_I32_I8 [[COPY]]
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; GCN: $sgpr0 = COPY [[S_SEXT_I32_I8_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_SEXT_INREG %0, 8
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$sgpr0 = COPY %1
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...
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---
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name: sext_inreg_sgpr_s32_16
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: sext_inreg_sgpr_s32_16
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; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN: [[S_SEXT_I32_I16_:%[0-9]+]]:sreg_32 = S_SEXT_I32_I16 [[COPY]]
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; GCN: $sgpr0 = COPY [[S_SEXT_I32_I16_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_SEXT_INREG %0, 16
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$sgpr0 = COPY %1
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...
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---
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name: sext_inreg_sgpr_s32_31
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: sext_inreg_sgpr_s32_31
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; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 2031616, implicit-def $scc
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; GCN: $sgpr0 = COPY [[S_BFE_I32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_SEXT_INREG %0, 31
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$sgpr0 = COPY %1
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...
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---
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name: sext_inreg_sgpr_s64_1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; GCN-LABEL: name: sext_inreg_sgpr_s64_1
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; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
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; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 65536, implicit-def $scc
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; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:sgpr(s64) = G_SEXT_INREG %0, 1
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$sgpr0_sgpr1 = COPY %1
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...
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---
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name: sext_inreg_sgpr_s64_2
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; GCN-LABEL: name: sext_inreg_sgpr_s64_2
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; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
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; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 131072, implicit-def $scc
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; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:sgpr(s64) = G_SEXT_INREG %0, 2
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$sgpr0_sgpr1 = COPY %1
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...
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---
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name: sext_inreg_sgpr_s64_8
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; GCN-LABEL: name: sext_inreg_sgpr_s64_8
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; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
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; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 524288, implicit-def $scc
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; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:sgpr(s64) = G_SEXT_INREG %0, 8
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$sgpr0_sgpr1 = COPY %1
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...
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---
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name: sext_inreg_sgpr_s64_16
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; GCN-LABEL: name: sext_inreg_sgpr_s64_16
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; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
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; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 1048576, implicit-def $scc
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; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:sgpr(s64) = G_SEXT_INREG %0, 16
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$sgpr0_sgpr1 = COPY %1
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...
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---
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name: sext_inreg_sgpr_s64_31
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; GCN-LABEL: name: sext_inreg_sgpr_s64_31
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; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
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; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 2031616, implicit-def $scc
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; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:sgpr(s64) = G_SEXT_INREG %0, 31
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$sgpr0_sgpr1 = COPY %1
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...
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# Ideally this degenerate case would have been replaceed with a 32-bit shift by combines.
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---
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name: sext_inreg_sgpr_s64_32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; GCN-LABEL: name: sext_inreg_sgpr_s64_32
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; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
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; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 2097152, implicit-def $scc
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; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:sgpr(s64) = G_SEXT_INREG %0, 32
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$sgpr0_sgpr1 = COPY %1
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...
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---
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name: sext_inreg_sgpr_s64_63
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; GCN-LABEL: name: sext_inreg_sgpr_s64_63
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; GCN: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; GCN: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]].sub0, %subreg.sub0, [[DEF]], %subreg.sub1
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; GCN: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 4128768, implicit-def $scc
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; GCN: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:sgpr(s64) = G_SEXT_INREG %0, 63
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$sgpr0_sgpr1 = COPY %1
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...
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---
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name: sext_inreg_vgpr_s32_1
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legalized: true
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regBankSelected: true
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||
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body: |
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||
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bb.0:
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liveins: $vgpr0
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||
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; GCN-LABEL: name: sext_inreg_vgpr_s32_1
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 1, implicit $exec
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||
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; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
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||
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%0:vgpr(s32) = COPY $vgpr0
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||
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%1:vgpr(s32) = G_SEXT_INREG %0, 1
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$vgpr0 = COPY %1
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|
...
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---
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||
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||
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name: sext_inreg_vgpr_s32_2
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||
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legalized: true
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||
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regBankSelected: true
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||
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body: |
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||
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|
bb.0:
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||
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liveins: $vgpr0
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; GCN-LABEL: name: sext_inreg_vgpr_s32_2
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 2, implicit $exec
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||
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; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
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||
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%0:vgpr(s32) = COPY $vgpr0
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||
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%1:vgpr(s32) = G_SEXT_INREG %0, 2
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$vgpr0 = COPY %1
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|
...
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---
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||
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||
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name: sext_inreg_vgpr_s32_8
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legalized: true
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||
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regBankSelected: true
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||
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body: |
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||
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bb.0:
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||
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liveins: $vgpr0
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; GCN-LABEL: name: sext_inreg_vgpr_s32_8
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 8, implicit $exec
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; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = G_SEXT_INREG %0, 8
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$vgpr0 = COPY %1
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...
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---
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||
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||
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name: sext_inreg_vgpr_s32_16
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||
|
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legalized: true
|
||
|
|
regBankSelected: true
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||
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body: |
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||
|
|
bb.0:
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||
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liveins: $vgpr0
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; GCN-LABEL: name: sext_inreg_vgpr_s32_16
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||
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 16, implicit $exec
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||
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; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
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||
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|
%0:vgpr(s32) = COPY $vgpr0
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||
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%1:vgpr(s32) = G_SEXT_INREG %0, 16
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||
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$vgpr0 = COPY %1
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||
|
|
...
|
||
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---
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||
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name: sext_inreg_vgpr_s32_31
|
||
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legalized: true
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||
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: sext_inreg_vgpr_s32_31
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||
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||
|
|
; GCN: [[V_BFE_I32_:%[0-9]+]]:vgpr_32 = V_BFE_I32 [[COPY]], 0, 31, implicit $exec
|
||
|
|
; GCN: $vgpr0 = COPY [[V_BFE_I32_]]
|
||
|
|
%0:vgpr(s32) = COPY $vgpr0
|
||
|
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%1:vgpr(s32) = G_SEXT_INREG %0, 31
|
||
|
|
$vgpr0 = COPY %1
|
||
|
|
...
|