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66 lines
3.2 KiB
66 lines
3.2 KiB
4 months ago
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX6 %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX8 %s
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# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX8 %s
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---
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name: trunc_sgpr_v2s32_to_v2s16
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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; GFX6-LABEL: name: trunc_sgpr_v2s32_to_v2s16
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; GFX6: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GFX6: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
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; GFX6: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
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; GFX6: [[S_LSHL_B32_:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY2]], 16, implicit-def $scc
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; GFX6: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
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; GFX6: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def $scc
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; GFX6: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[S_LSHL_B32_]], [[S_AND_B32_]], implicit-def $scc
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; GFX6: S_ENDPGM 0, implicit [[S_OR_B32_]]
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; GFX8-LABEL: name: trunc_sgpr_v2s32_to_v2s16
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; GFX8: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GFX8: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub0
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; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]].sub1
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; GFX8: [[S_LSHL_B32_:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY2]], 16, implicit-def $scc
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; GFX8: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
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; GFX8: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[COPY1]], [[S_MOV_B32_]], implicit-def $scc
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; GFX8: [[S_OR_B32_:%[0-9]+]]:sreg_32 = S_OR_B32 [[S_LSHL_B32_]], [[S_AND_B32_]], implicit-def $scc
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; GFX8: S_ENDPGM 0, implicit [[S_OR_B32_]]
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%0:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1
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%1:sgpr(<2 x s16>) = G_TRUNC %0
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S_ENDPGM 0, implicit %1
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...
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---
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name: trunc_vgpr_v2s32_to_v2s16
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; GFX6-LABEL: name: trunc_vgpr_v2s32_to_v2s16
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; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX6: [[V_LSHLREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B32_e64 16, [[COPY2]], implicit $exec
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; GFX6: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 65535, implicit $exec
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; GFX6: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[COPY1]], [[V_MOV_B32_e32_]], implicit $exec
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; GFX6: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[V_LSHLREV_B32_e64_]], [[V_AND_B32_e64_]], implicit $exec
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; GFX6: S_ENDPGM 0, implicit [[V_OR_B32_e64_]]
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; GFX8-LABEL: name: trunc_vgpr_v2s32_to_v2s16
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
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; GFX8: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub1
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; GFX8: [[V_MOV_B32_sdwa:%[0-9]+]]:vgpr_32 = V_MOV_B32_sdwa 0, [[COPY2]], 0, 5, 2, 4, implicit $exec, implicit [[COPY1]](tied-def 0)
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; GFX8: S_ENDPGM 0, implicit [[V_MOV_B32_sdwa]]
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%0:vgpr(<2 x s32>) = COPY $vgpr0_vgpr1
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%1:vgpr(<2 x s16>) = G_TRUNC %0
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S_ENDPGM 0, implicit %1
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...
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