You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
83 lines
2.7 KiB
83 lines
2.7 KiB
4 months ago
|
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||
|
|
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs %s -o - | FileCheck %s
|
||
|
|
|
||
|
|
---
|
||
|
|
name: update_dpp_ss
|
||
|
|
legalized: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $sgpr0, $sgpr1
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: update_dpp_ss
|
||
|
|
; CHECK: liveins: $sgpr0, $sgpr1
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:sgpr(p3) = COPY $sgpr0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||
|
|
; CHECK: [[COPY2:%[0-9]+]]:vgpr(p3) = COPY [[COPY]](p3)
|
||
|
|
; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
|
||
|
|
; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.update.dpp), [[COPY2]](p3), [[COPY3]](s32), 0, 0, 0, 0
|
||
|
|
%0:_(p3) = COPY $sgpr0
|
||
|
|
%1:_(s32) = COPY $sgpr1
|
||
|
|
%2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.update.dpp), %0, %1, 0, 0, 0, 0
|
||
|
|
|
||
|
|
...
|
||
|
|
|
||
|
|
---
|
||
|
|
name: update_dpp_sv
|
||
|
|
legalized: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $sgpr0, $vgpr0
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: update_dpp_sv
|
||
|
|
; CHECK: liveins: $sgpr0, $vgpr0
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:sgpr(p3) = COPY $sgpr0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||
|
|
; CHECK: [[COPY2:%[0-9]+]]:vgpr(p3) = COPY [[COPY]](p3)
|
||
|
|
; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.update.dpp), [[COPY2]](p3), [[COPY1]](s32), 0, 0, 0, 0
|
||
|
|
%0:_(p3) = COPY $sgpr0
|
||
|
|
%1:_(s32) = COPY $vgpr0
|
||
|
|
%2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.update.dpp), %0, %1, 0, 0, 0, 0
|
||
|
|
|
||
|
|
...
|
||
|
|
|
||
|
|
---
|
||
|
|
name: update_dpp_vs
|
||
|
|
legalized: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $vgpr0, $sgpr0
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: update_dpp_vs
|
||
|
|
; CHECK: liveins: $vgpr0, $sgpr0
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||
|
|
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
|
||
|
|
; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.update.dpp), [[COPY]](p3), [[COPY2]](s32), 0, 0, 0, 0
|
||
|
|
%0:_(p3) = COPY $vgpr0
|
||
|
|
%1:_(s32) = COPY $sgpr0
|
||
|
|
%2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.update.dpp), %0, %1, 0, 0, 0, 0
|
||
|
|
|
||
|
|
...
|
||
|
|
|
||
|
|
---
|
||
|
|
name: update_dpp_vv
|
||
|
|
legalized: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $vgpr0, $vgpr1
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: update_dpp_vv
|
||
|
|
; CHECK: liveins: $vgpr0, $vgpr1
|
||
|
|
; CHECK: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0
|
||
|
|
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||
|
|
; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.update.dpp), [[COPY]](p3), [[COPY1]](s32), 0, 0, 0, 0
|
||
|
|
%0:_(p3) = COPY $vgpr0
|
||
|
|
%1:_(s32) = COPY $vgpr1
|
||
|
|
%2:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.update.dpp), %0, %1, 0, 0, 0, 0
|
||
|
|
|
||
|
|
...
|