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86 lines
3.4 KiB
86 lines
3.4 KiB
4 months ago
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; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9 %s
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; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX10 %s
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; GCN-LABEL: flat_inst_offset:
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; GFX9: flat_load_dword v{{[0-9]+}}, v[{{[0-9:]+}}] offset:4
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; GFX9: flat_store_dword v[{{[0-9:]+}}], v{{[0-9]+}} offset:4
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; GFX10: flat_load_dword v{{[0-9]+}}, v[{{[0-9:]+}}]{{$}}
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; GFX10: flat_store_dword v[{{[0-9:]+}}], v{{[0-9]+}}{{$}}
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define void @flat_inst_offset(i32* nocapture %p) {
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%gep = getelementptr inbounds i32, i32* %p, i64 1
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%load = load i32, i32* %gep, align 4
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%inc = add nsw i32 %load, 1
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store i32 %inc, i32* %gep, align 4
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ret void
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}
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; GCN-LABEL: global_inst_offset:
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; GCN: global_load_dword v{{[0-9]+}}, v[{{[0-9:]+}}], off offset:4
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; GCN: global_store_dword v[{{[0-9:]+}}], v{{[0-9]+}}, off offset:4
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define void @global_inst_offset(i32 addrspace(1)* nocapture %p) {
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%gep = getelementptr inbounds i32, i32 addrspace(1)* %p, i64 1
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%load = load i32, i32 addrspace(1)* %gep, align 4
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%inc = add nsw i32 %load, 1
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store i32 %inc, i32 addrspace(1)* %gep, align 4
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ret void
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}
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; GCN-LABEL: load_i16_lo:
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; GFX9: flat_load_short_d16 v{{[0-9]+}}, v[{{[0-9:]+}}] offset:8{{$}}
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; GFX10: flat_load_short_d16 v{{[0-9]+}}, v[{{[0-9:]+}}]{{$}}
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define amdgpu_kernel void @load_i16_lo(i16* %arg, <2 x i16>* %out) {
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%gep = getelementptr inbounds i16, i16* %arg, i32 4
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%ld = load i16, i16* %gep, align 2
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%vec = insertelement <2 x i16> <i16 undef, i16 0>, i16 %ld, i32 0
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%v = add <2 x i16> %vec, %vec
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store <2 x i16> %v, <2 x i16>* %out, align 4
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ret void
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}
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; GCN-LABEL: load_i16_hi:
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; GFX9: flat_load_short_d16_hi v{{[0-9]+}}, v[{{[0-9:]+}}] offset:8{{$}}
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; GFX10: flat_load_short_d16_hi v{{[0-9]+}}, v[{{[0-9:]+}}]{{$}}
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define amdgpu_kernel void @load_i16_hi(i16* %arg, <2 x i16>* %out) {
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%gep = getelementptr inbounds i16, i16* %arg, i32 4
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%ld = load i16, i16* %gep, align 2
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%vec = insertelement <2 x i16> <i16 0, i16 undef>, i16 %ld, i32 1
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%v = add <2 x i16> %vec, %vec
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store <2 x i16> %v, <2 x i16>* %out, align 4
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ret void
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}
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; GCN-LABEL: load_half_lo:
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; GFX9: flat_load_short_d16 v{{[0-9]+}}, v[{{[0-9:]+}}] offset:8{{$}}
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; GFX10: flat_load_short_d16 v{{[0-9]+}}, v[{{[0-9:]+}}]{{$}}
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define amdgpu_kernel void @load_half_lo(half* %arg, <2 x half>* %out) {
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%gep = getelementptr inbounds half, half* %arg, i32 4
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%ld = load half, half* %gep, align 2
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%vec = insertelement <2 x half> <half undef, half 0xH0000>, half %ld, i32 0
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%v = fadd <2 x half> %vec, %vec
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store <2 x half> %v, <2 x half>* %out, align 4
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ret void
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}
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; GCN-LABEL: load_half_hi:
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; GFX9: flat_load_short_d16_hi v{{[0-9]+}}, v[{{[0-9:]+}}] offset:8{{$}}
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; GFX10: flat_load_short_d16_hi v{{[0-9]+}}, v[{{[0-9:]+}}]{{$}}
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define amdgpu_kernel void @load_half_hi(half* %arg, <2 x half>* %out) {
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%gep = getelementptr inbounds half, half* %arg, i32 4
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%ld = load half, half* %gep, align 2
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%vec = insertelement <2 x half> <half 0xH0000, half undef>, half %ld, i32 1
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%v = fadd <2 x half> %vec, %vec
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store <2 x half> %v, <2 x half>* %out, align 4
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ret void
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}
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; GCN-LABEL: load_float_lo:
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; GFX9: flat_load_dword v{{[0-9]+}}, v[{{[0-9:]+}}] offset:16{{$}}
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; GFX10: flat_load_dword v{{[0-9]+}}, v[{{[0-9:]+}}]{{$}}
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define amdgpu_kernel void @load_float_lo(float* %arg, float* %out) {
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%gep = getelementptr inbounds float, float* %arg, i32 4
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%ld = load float, float* %gep, align 4
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%v = fadd float %ld, %ld
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store float %v, float* %out, align 4
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ret void
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}
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