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99 lines
4.5 KiB
99 lines
4.5 KiB
4 months ago
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; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX1010 %s
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; GCN-LABEL: {{^}}addMul2D:
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; GFX1010: v_fmac_f16
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; GFX1010: v_fmac_f16
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define hidden <4 x half> @addMul2D(<4 x i8>* nocapture readonly %arg, float addrspace(4)* nocapture readonly %arg1, <2 x i32> %arg2, i32 %arg3) local_unnamed_addr #0 {
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bb:
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%tmp = extractelement <2 x i32> %arg2, i64 1
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%tmp4 = icmp sgt i32 %tmp, 0
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br i1 %tmp4, label %bb5, label %bb36
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bb5: ; preds = %bb
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%tmp6 = extractelement <2 x i32> %arg2, i64 0
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%tmp7 = icmp sgt i32 %tmp6, 0
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br label %bb8
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bb8: ; preds = %bb32, %bb5
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%tmp9 = phi <4 x half> [ zeroinitializer, %bb5 ], [ %tmp33, %bb32 ]
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%tmp10 = phi i32 [ 0, %bb5 ], [ %tmp34, %bb32 ]
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br i1 %tmp7, label %bb11, label %bb32
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bb11: ; preds = %bb8
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%tmp12 = mul nsw i32 %tmp10, %arg3
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%tmp13 = mul nsw i32 %tmp10, %tmp6
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br label %bb14
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bb14: ; preds = %bb14, %bb11
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%tmp15 = phi <4 x half> [ %tmp9, %bb11 ], [ %tmp29, %bb14 ]
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%tmp16 = phi i32 [ 0, %bb11 ], [ %tmp30, %bb14 ]
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%tmp17 = add nsw i32 %tmp16, %tmp12
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%tmp18 = sext i32 %tmp17 to i64
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%tmp19 = getelementptr inbounds <4 x i8>, <4 x i8>* %arg, i64 %tmp18
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%tmp20 = load <4 x i8>, <4 x i8>* %tmp19, align 4
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%tmp21 = tail call <4 x half> @_Z13convert_half4Dv4_h(<4 x i8> %tmp20)
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%tmp22 = add nsw i32 %tmp16, %tmp13
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%tmp23 = sext i32 %tmp22 to i64
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%tmp24 = getelementptr inbounds float, float addrspace(4)* %arg1, i64 %tmp23
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%tmp25 = load float, float addrspace(4)* %tmp24, align 4
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%tmp26 = fptrunc float %tmp25 to half
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%tmp27 = insertelement <4 x half> undef, half %tmp26, i32 0
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%tmp28 = shufflevector <4 x half> %tmp27, <4 x half> undef, <4 x i32> zeroinitializer
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%vec.A.0 = extractelement <4 x half> %tmp21, i32 0
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%vec.B.0 = extractelement <4 x half> %tmp28, i32 0
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%vec.C.0 = extractelement <4 x half> %tmp15, i32 0
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%vec.res.0 = tail call half @llvm.fmuladd.f16(half %vec.A.0, half %vec.B.0, half %vec.C.0)
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%vec.A.1 = extractelement <4 x half> %tmp21, i32 1
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%vec.B.1 = extractelement <4 x half> %tmp28, i32 1
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%vec.C.1 = extractelement <4 x half> %tmp15, i32 1
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%vec.res.1 = tail call half @llvm.fmuladd.f16(half %vec.A.1, half %vec.B.1, half %vec.C.1)
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%vec.A.2 = extractelement <4 x half> %tmp21, i32 2
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%vec.B.2 = extractelement <4 x half> %tmp28, i32 2
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%vec.C.2 = extractelement <4 x half> %tmp15, i32 2
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%vec.res.2 = tail call half @llvm.fmuladd.f16(half %vec.A.2, half %vec.B.2, half %vec.C.2)
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%vec.A.3 = extractelement <4 x half> %tmp21, i32 3
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%vec.B.3 = extractelement <4 x half> %tmp28, i32 3
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%vec.C.3 = extractelement <4 x half> %tmp15, i32 3
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%vec.res.3 = tail call half @llvm.fmuladd.f16(half %vec.A.3, half %vec.B.3, half %vec.C.3)
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%full.res.0 = insertelement <4 x half> undef, half %vec.res.0, i32 0
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%full.res.1 = insertelement <4 x half> %full.res.0, half %vec.res.1, i32 1
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%full.res.2 = insertelement <4 x half> %full.res.1, half %vec.res.2, i32 2
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%tmp29 = insertelement <4 x half> %full.res.2, half %vec.res.3, i32 3
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%tmp30 = add nuw nsw i32 %tmp16, 1
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%tmp31 = icmp eq i32 %tmp30, %tmp6
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br i1 %tmp31, label %bb32, label %bb14
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bb32: ; preds = %bb14, %bb8
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%tmp33 = phi <4 x half> [ %tmp9, %bb8 ], [ %tmp29, %bb14 ]
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%tmp34 = add nuw nsw i32 %tmp10, 1
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%tmp35 = icmp eq i32 %tmp34, %tmp
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br i1 %tmp35, label %bb36, label %bb8
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bb36: ; preds = %bb32, %bb
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%tmp37 = phi <4 x half> [ zeroinitializer, %bb ], [ %tmp33, %bb32 ]
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ret <4 x half> %tmp37
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}
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; Function Attrs: norecurse nounwind readnone
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define linkonce_odr hidden <4 x half> @_Z13convert_half4Dv4_h(<4 x i8> %arg) local_unnamed_addr #1 {
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bb:
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%tmp = extractelement <4 x i8> %arg, i64 0
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%tmp1 = uitofp i8 %tmp to half
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%tmp2 = insertelement <4 x half> undef, half %tmp1, i32 0
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%tmp3 = extractelement <4 x i8> %arg, i64 1
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%tmp4 = uitofp i8 %tmp3 to half
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%tmp5 = insertelement <4 x half> %tmp2, half %tmp4, i32 1
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%tmp6 = extractelement <4 x i8> %arg, i64 2
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%tmp7 = uitofp i8 %tmp6 to half
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%tmp8 = insertelement <4 x half> %tmp5, half %tmp7, i32 2
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%tmp9 = extractelement <4 x i8> %arg, i64 3
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%tmp10 = uitofp i8 %tmp9 to half
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%tmp11 = insertelement <4 x half> %tmp8, half %tmp10, i32 3
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ret <4 x half> %tmp11
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}
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declare half @llvm.fmuladd.f16(half, half, half)
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attributes #0 = { convergent nounwind readonly}
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attributes #1 = { norecurse nounwind readnone }
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