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229 lines
6.1 KiB
229 lines
6.1 KiB
4 months ago
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# RUN: llc -mtriple arm-- -run-pass=legalizer %s -o - | FileCheck %s
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# RUN: llc -mtriple thumb-- -mattr=+v6t2 -run-pass=legalizer %s -o - | FileCheck %s
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--- |
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define void @test_zext_s16_to_s32() { ret void }
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define void @test_sext_s8_to_s32() { ret void }
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define void @test_sext_inreg_s8_to_s32() { ret void }
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define void @test_anyext_s1_to_s32() { ret void }
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define void @test_zext_s8_to_s16() { ret void }
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define void @test_sext_s1_to_s16() { ret void }
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define void @test_anyext_s1_to_s8() { ret void }
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define void @test_ext_combine() { ret void }
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...
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---
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name: test_zext_s16_to_s32
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# CHECK-LABEL: name: test_zext_s16_to_s32
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: $r0
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%0(p0) = COPY $r0
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%1(s16) = G_LOAD %0 :: (load 2)
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%2(s32) = G_ZEXT %1
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; G_ZEXT with s16 is legal, so we should find it unchanged in the output
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; CHECK: {{%[0-9]+}}:_(s32) = G_ZEXT {{%[0-9]+}}
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$r0 = COPY %2(s32)
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BX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_sext_s8_to_s32
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# CHECK-LABEL: name: test_sext_s8_to_s32
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: $r0
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%0(p0) = COPY $r0
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%1(s8) = G_LOAD %0(p0) :: (load 1)
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%2(s32) = G_SEXT %1
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; G_SEXT with s8 is legal, so we should find it unchanged in the output
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; CHECK: {{%[0-9]+}}:_(s32) = G_SEXT {{%[0-9]+}}
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$r0 = COPY %2(s32)
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BX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_sext_inreg_s8_to_s32
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# CHECK-LABEL: name: test_sext_inreg_s8_to_s32
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: $r0
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%0(p0) = COPY $r0
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%1(s32) = G_LOAD %0(p0) :: (load 4)
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%2(s32) = G_SEXT_INREG %1, 8
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; G_SEXT_INREG should be lowered to a shift pair
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; CHECK: [[T1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
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; CHECK: [[T2:%[0-9]+]]:_(s32) = G_SHL {{%[0-9]+}}, [[T1]]
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; CHECK: {{%[0-9]+}}:_(s32) = G_ASHR [[T2]], [[T1]]
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$r0 = COPY %2(s32)
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BX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_anyext_s1_to_s32
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# CHECK-LABEL: name: test_anyext_s1_to_s32
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: $r0
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%0(p0) = COPY $r0
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%1(s1) = G_LOAD %0(p0) :: (load 1)
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%2(s32) = G_ANYEXT %1
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; G_ANYEXT with s1 is legal, so we should find it unchanged in the output
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; CHECK: {{%[0-9]+}}:_(s32) = G_ANYEXT {{%[0-9]+}}
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$r0 = COPY %2(s32)
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BX_RET 14, $noreg, implicit $r0
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...
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---
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name: test_zext_s8_to_s16
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# CHECK-LABEL: name: test_zext_s8_to_s16
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: $r0
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%0(p0) = COPY $r0
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%1(s8) = G_LOAD %0(p0) :: (load 1)
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%2(s16) = G_ZEXT %1
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; G_ZEXT from s8 to s16 is legal, so we should find it unchanged in the output
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; CHECK: {{%[0-9]+}}:_(s16) = G_ZEXT {{%[0-9]+}}(s8)
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G_STORE %2(s16), %0(p0) :: (store 2)
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BX_RET 14, $noreg
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...
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---
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name: test_sext_s1_to_s16
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# CHECK-LABEL: name: test_sext_s1_to_s16
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: $r0
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%0(p0) = COPY $r0
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%1(s1) = G_LOAD %0(p0) :: (load 1)
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%2(s16) = G_SEXT %1(s1)
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; G_SEXT from s1 to s16 is legal, so we should find it unchanged in the output
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; CHECK: {{%[0-9]+}}:_(s16) = G_SEXT {{%[0-9]+}}(s1)
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G_STORE %2(s16), %0(p0) :: (store 2)
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BX_RET 14, $noreg
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...
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---
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name: test_anyext_s1_to_s8
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# CHECK-LABEL: name: test_anyext_s1_to_s8
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: $r0
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%0(p0) = COPY $r0
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%1(s1) = G_LOAD %0(p0) :: (load 1)
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%2(s8) = G_ANYEXT %1
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; G_ANYEXT from s1 to s8 is legal, so we should find it unchanged in the output
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; CHECK: {{%[0-9]+}}:_(s8) = G_ANYEXT {{%[0-9]+}}(s1)
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G_STORE %2(s8), %0(p0) :: (store 1)
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BX_RET 14, $noreg
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...
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---
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name: test_ext_combine
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# CHECK-LABEL: name: test_ext_combine
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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body: |
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bb.0:
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liveins: $r0
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%0(p0) = COPY $r0
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%1(s8) = G_LOAD %0(p0) :: (load 1)
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; CHECK: [[V8:%[0-9]+]]:_(s8) = G_LOAD
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%2(s16) = G_ZEXT %1
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%3(s16) = G_SEXT %1
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%4(s16) = G_OR %2, %3
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; G_OR is going to widen to 32 bits and the extensions/truncs should combine
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; with the already existing ones
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; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[V8]](s8)
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; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[V8]](s8)
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SEXT]]
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[OR]]
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; CHECK: [[BITS:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[BITS]](s32)
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; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[BITS]](s32)
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; CHECK: $r0 = COPY [[ASHR]]
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%5(s32) = G_SEXT %4(s16)
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$r0 = COPY %5
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BX_RET 14, $noreg, implicit $r0
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...
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