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276 lines
7.9 KiB
276 lines
7.9 KiB
4 months ago
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# RUN: llc -O0 -mtriple arm-- -mattr=+v6 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,ARM
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# RUN: llc -O0 -mtriple thumb-- -mattr=+v6t2,+dsp -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,THUMB
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--- |
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define void @test_pkhbt() { ret void }
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define void @test_pkhbt_commutative() { ret void }
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define void @test_pkhbt_imm16_31() { ret void }
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define void @test_pkhbt_unshifted() { ret void }
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define void @test_pkhtb_imm16() { ret void }
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define void @test_pkhtb_imm1_15() { ret void }
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...
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---
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name: test_pkhbt
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# CHECK-LABEL: name: test_pkhbt
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legalized: true
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regBankSelected: true
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selected: false
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# CHECK: selected: true
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registers:
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- { id: 0, class: gprb }
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- { id: 1, class: gprb }
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- { id: 2, class: gprb }
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- { id: 3, class: gprb }
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- { id: 4, class: gprb }
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- { id: 5, class: gprb }
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- { id: 6, class: gprb }
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- { id: 7, class: gprb }
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- { id: 8, class: gprb }
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body: |
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bb.0:
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liveins: $r0, $r1
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%0(s32) = COPY $r0
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%1(s32) = COPY $r1
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; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
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; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
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; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
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; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
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%2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
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%3(s32) = G_AND %0, %2
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%4(s32) = G_CONSTANT i32 7
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%5(s32) = G_SHL %1, %4
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%6(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
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%7(s32) = G_AND %5, %6
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%8(s32) = G_OR %3, %7
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; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 7, 14 /* CC::al */, $noreg
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; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHBT [[VREGX]], [[VREGY]], 7, 14 /* CC::al */, $noreg
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$r0 = COPY %8(s32)
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; CHECK: $r0 = COPY [[VREGR]]
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BX_RET 14, $noreg, implicit $r0
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: test_pkhbt_commutative
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# CHECK-LABEL: name: test_pkhbt_commutative
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legalized: true
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regBankSelected: true
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selected: false
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# CHECK: selected: true
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registers:
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- { id: 0, class: gprb }
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- { id: 1, class: gprb }
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- { id: 2, class: gprb }
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- { id: 3, class: gprb }
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- { id: 4, class: gprb }
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- { id: 5, class: gprb }
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- { id: 6, class: gprb }
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- { id: 7, class: gprb }
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- { id: 8, class: gprb }
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body: |
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bb.0:
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liveins: $r0, $r1
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%0(s32) = COPY $r0
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%1(s32) = COPY $r1
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; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
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; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
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; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
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; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
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%2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
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%3(s32) = G_AND %0, %2
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%4(s32) = G_CONSTANT i32 7
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%5(s32) = G_SHL %1, %4
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%6(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
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%7(s32) = G_AND %5, %6
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%8(s32) = G_OR %7, %3
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; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 7, 14 /* CC::al */, $noreg
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; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHBT [[VREGX]], [[VREGY]], 7, 14 /* CC::al */, $noreg
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$r0 = COPY %8(s32)
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; CHECK: $r0 = COPY [[VREGR]]
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BX_RET 14, $noreg, implicit $r0
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: test_pkhbt_imm16_31
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# CHECK-LABEL: name: test_pkhbt_imm16_31
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legalized: true
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regBankSelected: true
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selected: false
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# CHECK: selected: true
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registers:
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- { id: 0, class: gprb }
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- { id: 1, class: gprb }
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- { id: 2, class: gprb }
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- { id: 3, class: gprb }
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- { id: 4, class: gprb }
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- { id: 5, class: gprb }
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- { id: 6, class: gprb }
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body: |
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bb.0:
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liveins: $r0, $r1
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%0(s32) = COPY $r0
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%1(s32) = COPY $r1
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; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
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; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
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; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
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; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
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%2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
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%3(s32) = G_AND %0, %2
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%4(s32) = G_CONSTANT i32 17
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%5(s32) = G_SHL %1, %4
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%6(s32) = G_OR %3, %5
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; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 17, 14 /* CC::al */, $noreg
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; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHBT [[VREGX]], [[VREGY]], 17, 14 /* CC::al */, $noreg
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$r0 = COPY %6(s32)
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; CHECK: $r0 = COPY [[VREGR]]
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BX_RET 14, $noreg, implicit $r0
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: test_pkhbt_unshifted
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# CHECK-LABEL: name: test_pkhbt_unshifted
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legalized: true
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regBankSelected: true
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selected: false
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# CHECK: selected: true
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registers:
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- { id: 0, class: gprb }
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- { id: 1, class: gprb }
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- { id: 2, class: gprb }
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- { id: 3, class: gprb }
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- { id: 4, class: gprb }
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- { id: 5, class: gprb }
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- { id: 6, class: gprb }
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body: |
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bb.0:
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liveins: $r0, $r1
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%0(s32) = COPY $r0
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%1(s32) = COPY $r1
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; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
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; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
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; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
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; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
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%2(s32) = G_CONSTANT i32 65535 ; 0xFFFF
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%3(s32) = G_AND %0, %2
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%4(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
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%5(s32) = G_AND %1, %4
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%6(s32) = G_OR %3, %5
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; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHBT [[VREGX]], [[VREGY]], 0, 14 /* CC::al */, $noreg
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; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHBT [[VREGX]], [[VREGY]], 0, 14 /* CC::al */, $noreg
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$r0 = COPY %6(s32)
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; CHECK: $r0 = COPY [[VREGR]]
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BX_RET 14, $noreg, implicit $r0
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: test_pkhtb_imm16
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# CHECK-LABEL: name: test_pkhtb_imm16
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legalized: true
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regBankSelected: true
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selected: false
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# CHECK: selected: true
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registers:
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- { id: 0, class: gprb }
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- { id: 1, class: gprb }
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- { id: 2, class: gprb }
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- { id: 3, class: gprb }
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- { id: 4, class: gprb }
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- { id: 5, class: gprb }
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- { id: 6, class: gprb }
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body: |
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bb.0:
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liveins: $r0, $r1
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%0(s32) = COPY $r0
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%1(s32) = COPY $r1
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; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
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; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
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; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
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; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
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%2(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
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%3(s32) = G_AND %0, %2
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%4(s32) = G_CONSTANT i32 16
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%5(s32) = G_LSHR %1, %4
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%6(s32) = G_OR %3, %5
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; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHTB [[VREGX]], [[VREGY]], 16, 14 /* CC::al */, $noreg
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; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHTB [[VREGX]], [[VREGY]], 16, 14 /* CC::al */, $noreg
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$r0 = COPY %6(s32)
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; CHECK: $r0 = COPY [[VREGR]]
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BX_RET 14, $noreg, implicit $r0
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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---
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name: test_pkhtb_imm1_15
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# CHECK-LABEL: name: test_pkhtb_imm1_15
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legalized: true
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regBankSelected: true
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selected: false
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# CHECK: selected: true
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registers:
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- { id: 0, class: gprb }
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- { id: 1, class: gprb }
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- { id: 2, class: gprb }
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- { id: 3, class: gprb }
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- { id: 4, class: gprb }
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- { id: 5, class: gprb }
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- { id: 6, class: gprb }
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- { id: 7, class: gprb }
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- { id: 8, class: gprb }
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body: |
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bb.0:
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liveins: $r0, $r1
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%0(s32) = COPY $r0
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%1(s32) = COPY $r1
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; ARM-DAG: [[VREGX:%[0-9]+]]:gprnopc = COPY $r0
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; ARM-DAG: [[VREGY:%[0-9]+]]:gprnopc = COPY $r1
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; THUMB-DAG: [[VREGX:%[0-9]+]]:rgpr = COPY $r0
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; THUMB-DAG: [[VREGY:%[0-9]+]]:rgpr = COPY $r1
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%2(s32) = G_CONSTANT i32 4294901760 ; 0xFFFF0000
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%3(s32) = G_AND %0, %2
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%4(s32) = G_CONSTANT i32 7
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%5(s32) = G_LSHR %1, %4
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%6(s32) = G_CONSTANT i32 65535 ; 0xFFFF
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%7(s32) = G_AND %5, %6
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%8(s32) = G_OR %3, %7
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; ARM: [[VREGR:%[0-9]+]]:gprnopc = PKHTB [[VREGX]], [[VREGY]], 7, 14 /* CC::al */, $noreg
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; THUMB: [[VREGR:%[0-9]+]]:rgpr = t2PKHTB [[VREGX]], [[VREGY]], 7, 14 /* CC::al */, $noreg
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$r0 = COPY %8(s32)
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; CHECK: $r0 = COPY [[VREGR]]
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BX_RET 14, $noreg, implicit $r0
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; CHECK: BX_RET 14 /* CC::al */, $noreg, implicit $r0
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...
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