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34 lines
1.3 KiB
34 lines
1.3 KiB
4 months ago
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; Test strict vector addition on z14.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
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declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
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declare <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float>, <4 x float>, metadata, metadata)
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; Test a v4f32 addition.
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define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1,
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<4 x float> %val2) strictfp {
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; CHECK-LABEL: f1:
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; CHECK: vfasb %v24, %v26, %v28
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; CHECK: br %r14
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%ret = call <4 x float> @llvm.experimental.constrained.fadd.v4f32(
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<4 x float> %val1, <4 x float> %val2,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") strictfp
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ret <4 x float> %ret
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}
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; Test an f32 addition that uses vector registers.
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define float @f2(<4 x float> %val1, <4 x float> %val2) strictfp {
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; CHECK-LABEL: f2:
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; CHECK: wfasb %f0, %v24, %v26
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; CHECK: br %r14
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%scalar1 = extractelement <4 x float> %val1, i32 0
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%scalar2 = extractelement <4 x float> %val2, i32 0
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%ret = call float @llvm.experimental.constrained.fadd.f32(
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float %scalar1, float %scalar2,
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metadata !"round.dynamic",
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metadata !"fpexcept.strict") strictfp
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ret float %ret
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}
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