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214 lines
8.5 KiB
214 lines
8.5 KiB
4 months ago
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; RUN: llc -mtriple=thumbv8.1m.main -disable-arm-loloops=false -mattr=+lob -stop-after=arm-low-overhead-loops --verify-machineinstrs %s -o - | FileCheck %s
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; RUN: llc -mtriple=thumbv8.1m.main -disable-arm-loloops=false -mattr=+lob -stop-after=arm-low-overhead-loops --verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-GLOBAL
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; Not implemented as a mir test so that changes the generic HardwareLoop can
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; also be tested. These functions have been taken from
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; Transforms/HardwareLoops/loop-guards.ll in which can be seen the generation
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; of a few test.set intrinsics, but only one (ne_trip_count) gets generated
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; here. Simplifications result in icmps changing and maybe also the CFG. So,
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; TODO: Teach the HardwareLoops some better pattern recognition.
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; CHECK-GLOBAL-NOT: DoLoopStart
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; CHECK-GLOBAL-NOT: WhileLoopStart
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; CHECK-GLOBAL-NOT: LoopEnd
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; CHECK: ne_and_guard
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; CHECK: body:
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; CHECK: bb.0.entry:
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; CHECK: t2CMPri renamable $lr, 0
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; CHECK: tBcc %bb.4
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; CHECK: bb.2.while.body.preheader:
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; CHECK: $lr = t2DLS killed renamable $lr
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; CHECK: bb.3.while.body:
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; CHECK: $lr = t2LEUpdate killed renamable $lr, %bb.3
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define void @ne_and_guard(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%brmerge.demorgan = and i1 %t1, %t2
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%cmp6 = icmp ne i32 %N, 0
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%or.cond = and i1 %brmerge.demorgan, %cmp6
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br i1 %or.cond, label %while.body, label %if.end
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while.body: ; preds = %while.body, %entry
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%i.09 = phi i32 [ %inc, %while.body ], [ 0, %entry ]
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%a.addr.08 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %entry ]
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%b.addr.07 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %entry ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.07, i32 1
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%tmp = load i32, i32* %b.addr.07, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.08, i32 1
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store i32 %tmp, i32* %a.addr.08, align 4
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%inc = add nuw i32 %i.09, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %if.end, label %while.body
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if.end: ; preds = %while.body, %entry
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ret void
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}
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; TODO: This could generate WLS
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; CHECK: ne_preheader
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; CHECK: body:
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; CHECK: bb.0.entry:
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; CHECK: t2CMPri renamable $lr, 0
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; CHECK: tBcc %bb.4
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; CHECK: bb.2.while.body.preheader:
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; CHECK: $lr = t2DLS killed renamable $lr
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; CHECK: bb.3.while.body:
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; CHECK: $lr = t2LEUpdate killed renamable $lr, %bb.3
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define void @ne_preheader(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%brmerge.demorgan = and i1 %t1, %t2
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br i1 %brmerge.demorgan, label %while.preheader, label %if.end
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while.preheader: ; preds = %entry
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%cmp = icmp ne i32 %N, 0
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br i1 %cmp, label %while.body, label %if.end
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while.body: ; preds = %while.body, %while.preheader
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%i.09 = phi i32 [ %inc, %while.body ], [ 0, %while.preheader ]
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%a.addr.08 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %while.preheader ]
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%b.addr.07 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %while.preheader ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.07, i32 1
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%tmp = load i32, i32* %b.addr.07, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.08, i32 1
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store i32 %tmp, i32* %a.addr.08, align 4
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%inc = add nuw i32 %i.09, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %if.end, label %while.body
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if.end: ; preds = %while.body, %while.preheader, %entry
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ret void
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}
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; TODO: This could generate WLS
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; CHECK: eq_preheader
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; CHECK: body:
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; CHECK: bb.0.entry:
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; CHECK: t2CMPri renamable $lr, 0
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; CHECK: tBcc %bb.4
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; CHECK: bb.2.while.body.preheader:
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; CHECK: $lr = t2DLS killed renamable $lr
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; CHECK: bb.3.while.body:
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; CHECK: $lr = t2LEUpdate killed renamable $lr, %bb.3
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define void @eq_preheader(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%brmerge.demorgan = and i1 %t1, %t2
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br i1 %brmerge.demorgan, label %while.preheader, label %if.end
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while.preheader: ; preds = %entry
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%cmp = icmp eq i32 %N, 0
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br i1 %cmp, label %if.end, label %while.body
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while.body: ; preds = %while.body, %while.preheader
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%i.09 = phi i32 [ %inc, %while.body ], [ 0, %while.preheader ]
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%a.addr.08 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %while.preheader ]
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%b.addr.07 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %while.preheader ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.07, i32 1
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%tmp = load i32, i32* %b.addr.07, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.08, i32 1
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store i32 %tmp, i32* %a.addr.08, align 4
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%inc = add nuw i32 %i.09, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %if.end, label %while.body
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if.end: ; preds = %while.body, %while.preheader, %entry
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ret void
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}
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; TODO: This could generate WLS
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; CHECK: ne_prepreheader
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; CHECK: body:
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; CHECK: bb.0.entry:
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; CHECK: t2CMPri renamable $lr, 0
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; CHECK: tBcc %bb.4
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; CHECK: bb.2.while.body.preheader:
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; CHECK: $lr = t2DLS killed renamable $lr
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; CHECK: bb.3.while.body:
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; CHECK: $lr = t2LEUpdate killed renamable $lr, %bb.3
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define void @ne_prepreheader(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%cmp = icmp ne i32 %N, 0
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br i1 %cmp, label %while.preheader, label %if.end
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while.preheader: ; preds = %entry
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%brmerge.demorgan = and i1 %t1, %t2
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br i1 %brmerge.demorgan, label %while.body, label %if.end
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while.body: ; preds = %while.body, %while.preheader
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%i.09 = phi i32 [ %inc, %while.body ], [ 0, %while.preheader ]
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%a.addr.08 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %while.preheader ]
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%b.addr.07 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %while.preheader ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.07, i32 1
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%tmp = load i32, i32* %b.addr.07, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.08, i32 1
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store i32 %tmp, i32* %a.addr.08, align 4
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%inc = add nuw i32 %i.09, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %if.end, label %while.body
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if.end: ; preds = %while.body, %while.preheader, %entry
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ret void
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}
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; CHECK: be_ne
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; CHECK: body:
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; CHECK: bb.0.entry:
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; CHECK: $lr = t2DLS killed renamable $r12
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; CHECK: bb.2.do.body:
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; CHECK: $lr = t2LEUpdate killed renamable $lr, %bb.2
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define void @be_ne(i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%cmp = icmp ne i32 %N, 0
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%sub = sub i32 %N, 1
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%be = select i1 %cmp, i32 0, i32 %sub
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%cmp.1 = icmp ne i32 %be, 0
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br i1 %cmp.1, label %do.body, label %if.end
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do.body: ; preds = %do.body, %entry
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%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %entry ]
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%a.addr.0 = phi i32* [ %incdec.ptr3, %do.body ], [ %a, %entry ]
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%i.0 = phi i32 [ %inc, %do.body ], [ 0, %entry ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
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%tmp = load i32, i32* %b.addr.0, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
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store i32 %tmp, i32* %a.addr.0, align 4
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%inc = add nuw i32 %i.0, 1
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%cmp.2 = icmp ult i32 %inc, %N
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br i1 %cmp.2, label %do.body, label %if.end
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if.end: ; preds = %do.body, %entry
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ret void
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}
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; TODO: Remove the tMOVr in the preheader!
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; CHECK: ne_trip_count
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; CHECK: body:
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; CHECK: bb.0.entry:
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; CHECK: $lr = t2WLS $r3, %bb.3
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; CHECK: bb.1.do.body.preheader:
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; CHECK: $lr = tMOVr
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; CHECK: bb.2.do.body:
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; CHECK: $lr = t2LEUpdate killed renamable $lr, %bb.2
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define void @ne_trip_count(i1 zeroext %t1, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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br label %do.body.preheader
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do.body.preheader:
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%cmp = icmp ne i32 %N, 0
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br i1 %cmp, label %do.body, label %if.end
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do.body:
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%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %do.body.preheader ]
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%a.addr.0 = phi i32* [ %incdec.ptr3, %do.body ], [ %a, %do.body.preheader ]
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%i.0 = phi i32 [ %inc, %do.body ], [ 0, %do.body.preheader ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
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%tmp = load i32, i32* %b.addr.0, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
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store i32 %tmp, i32* %a.addr.0, align 4
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%inc = add nuw i32 %i.0, 1
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%cmp.1 = icmp ult i32 %inc, %N
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br i1 %cmp.1, label %do.body, label %if.end
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if.end: ; preds = %do.body, %entry
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ret void
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}
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