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359 lines
18 KiB
359 lines
18 KiB
4 months ago
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// Copyright 2019, VIXL authors
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// * Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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// * Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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// * Neither the name of ARM Limited nor the names of its contributors may be
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// used to endorse or promote products derived from this software without
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// specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
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// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
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// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// Test infrastructure.
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//
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// Tests are functions which accept no parameters and have no return values.
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// The testing code should not perform an explicit return once completed. For
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// example to test the mov immediate instruction a very simple test would be:
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//
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// TEST(mov_x0_one) {
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// SETUP();
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//
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// START();
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// __ mov(x0, 1);
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// END();
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//
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// if (CAN_RUN()) {
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// RUN();
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//
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// ASSERT_EQUAL_64(1, x0);
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// }
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// }
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//
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// Within a START ... END block all registers but sp can be modified. sp has to
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// be explicitly saved/restored. The END() macro replaces the function return
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// so it may appear multiple times in a test if the test has multiple exit
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// points.
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//
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// Tests requiring specific CPU features should specify exactly what they
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// require using SETUP_WITH_FEATURES(...) instead of SETUP().
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//
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// Once the test has been run all integer and floating point registers as well
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// as flags are accessible through a RegisterDump instance, see
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// utils-aarch64.cc for more info on RegisterDump.
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//
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// We provide some helper assert to handle common cases:
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//
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// ASSERT_EQUAL_32(int32_t, int_32t)
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// ASSERT_EQUAL_FP32(float, float)
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// ASSERT_EQUAL_32(int32_t, W register)
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// ASSERT_EQUAL_FP32(float, S register)
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// ASSERT_EQUAL_64(int64_t, int_64t)
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// ASSERT_EQUAL_FP64(double, double)
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// ASSERT_EQUAL_64(int64_t, X register)
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// ASSERT_EQUAL_64(X register, X register)
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// ASSERT_EQUAL_FP64(double, D register)
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//
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// e.g. ASSERT_EQUAL_64(0.5, d30);
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//
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// If more advanced computation is required before the assert then access the
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// RegisterDump named core directly:
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//
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// ASSERT_EQUAL_64(0x1234, core->reg_x0() & 0xffff);
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namespace vixl {
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namespace aarch64 {
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#define __ masm.
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#define TEST(name) TEST_(AARCH64_ASM_##name)
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#ifdef VIXL_INCLUDE_SIMULATOR_AARCH64
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// Run tests with the simulator.
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#define SETUP() \
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MacroAssembler masm; \
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SETUP_COMMON(); \
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SETUP_COMMON_SIM()
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#define SETUP_WITH_FEATURES(...) \
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MacroAssembler masm; \
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SETUP_COMMON(); \
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SETUP_COMMON_SIM(); \
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masm.SetCPUFeatures(CPUFeatures(__VA_ARGS__)); \
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simulator.SetCPUFeatures(CPUFeatures(__VA_ARGS__))
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#define SETUP_CUSTOM(size, pic) \
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MacroAssembler masm(size + CodeBuffer::kDefaultCapacity, pic); \
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SETUP_COMMON(); \
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SETUP_COMMON_SIM()
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#define SETUP_CUSTOM_SIM(...) \
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MacroAssembler masm; \
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SETUP_COMMON(); \
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Simulator simulator(&simulator_decoder, stdout, __VA_ARGS__); \
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simulator.SetColouredTrace(Test::coloured_trace()); \
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simulator.SetCPUFeatures(CPUFeatures::None())
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#define SETUP_COMMON() \
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bool queried_can_run = false; \
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bool printed_sve_lane_warning = false; \
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/* Avoid unused-variable warnings in case a test never calls RUN(). */ \
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USE(queried_can_run); \
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USE(printed_sve_lane_warning); \
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masm.SetCPUFeatures(CPUFeatures::None()); \
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masm.SetGenerateSimulatorCode(true); \
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Decoder simulator_decoder; \
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RegisterDump core; \
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ptrdiff_t offset_after_infrastructure_start; \
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ptrdiff_t offset_before_infrastructure_end
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#define SETUP_COMMON_SIM() \
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Simulator simulator(&simulator_decoder); \
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simulator.SetColouredTrace(Test::coloured_trace()); \
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simulator.SetCPUFeatures(CPUFeatures::None())
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#define START() \
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masm.Reset(); \
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simulator.ResetState(); \
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{ \
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SimulationCPUFeaturesScope cpu(&masm, kInfrastructureCPUFeatures); \
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__ PushCalleeSavedRegisters(); \
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} \
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{ \
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int trace_parameters = 0; \
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if (Test::trace_reg()) trace_parameters |= LOG_STATE; \
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if (Test::trace_write()) trace_parameters |= LOG_WRITE; \
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if (Test::trace_sim()) trace_parameters |= LOG_DISASM; \
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if (Test::trace_branch()) trace_parameters |= LOG_BRANCH; \
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if (trace_parameters != 0) { \
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__ Trace(static_cast<TraceParameters>(trace_parameters), TRACE_ENABLE); \
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} \
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} \
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offset_after_infrastructure_start = masm.GetCursorOffset(); \
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/* Avoid unused-variable warnings in case a test never calls RUN(). */ \
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USE(offset_after_infrastructure_start)
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#define END() \
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offset_before_infrastructure_end = masm.GetCursorOffset(); \
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/* Avoid unused-variable warnings in case a test never calls RUN(). */ \
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USE(offset_before_infrastructure_end); \
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__ Trace(LOG_ALL, TRACE_DISABLE); \
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{ \
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SimulationCPUFeaturesScope cpu(&masm, kInfrastructureCPUFeatures); \
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core.Dump(&masm); \
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__ PopCalleeSavedRegisters(); \
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} \
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__ Ret(); \
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masm.FinalizeCode()
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#define RUN() \
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RUN_WITHOUT_SEEN_FEATURE_CHECK(); \
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{ \
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/* We expect the test to use all of the features it requested, plus the */ \
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/* features that the instructure code requires. */ \
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CPUFeatures const& expected = \
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simulator.GetCPUFeatures()->With(CPUFeatures::kNEON); \
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CPUFeatures const& seen = simulator.GetSeenFeatures(); \
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/* This gives three broad categories of features that we care about: */ \
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/* 1. Things both expected and seen. */ \
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/* 2. Things seen, but not expected. The simulator catches these. */ \
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/* 3. Things expected, but not seen. We check these here. */ \
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/* In a valid, passing test, categories 2 and 3 should be empty. */ \
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if (seen != expected) { \
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/* The Simulator should have caught anything in category 2 already. */ \
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VIXL_ASSERT(expected.Has(seen)); \
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/* Anything left is category 3: things expected, but not seen. This */ \
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/* is not necessarily a bug in VIXL itself, but indicates that the */ \
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/* test is less strict than it could be. */ \
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CPUFeatures missing = expected.Without(seen); \
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VIXL_ASSERT(missing.Count() > 0); \
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std::cout << "Error: expected to see CPUFeatures { " << missing \
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<< " }\n"; \
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VIXL_ABORT(); \
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} \
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}
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#define RUN_WITHOUT_SEEN_FEATURE_CHECK() \
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DISASSEMBLE(); \
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VIXL_ASSERT(QUERIED_CAN_RUN()); \
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VIXL_ASSERT(CAN_RUN()); \
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simulator.RunFrom(masm.GetBuffer()->GetStartAddress<Instruction*>())
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#else // ifdef VIXL_INCLUDE_SIMULATOR_AARCH64.
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#define SETUP() \
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MacroAssembler masm; \
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SETUP_COMMON()
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#define SETUP_WITH_FEATURES(...) \
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MacroAssembler masm; \
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SETUP_COMMON(); \
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masm.SetCPUFeatures(CPUFeatures(__VA_ARGS__))
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#define SETUP_CUSTOM(size, pic) \
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size_t buffer_size = size + CodeBuffer::kDefaultCapacity; \
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MacroAssembler masm(buffer_size, pic); \
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SETUP_COMMON()
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#define SETUP_COMMON() \
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bool queried_can_run = false; \
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bool printed_sve_lane_warning = false; \
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/* Avoid unused-variable warnings in case a test never calls RUN(). */ \
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USE(queried_can_run); \
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USE(printed_sve_lane_warning); \
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masm.SetCPUFeatures(CPUFeatures::None()); \
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masm.SetGenerateSimulatorCode(false); \
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RegisterDump core; \
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CPU::SetUp(); \
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ptrdiff_t offset_after_infrastructure_start; \
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ptrdiff_t offset_before_infrastructure_end
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#define START() \
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masm.Reset(); \
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{ \
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CPUFeaturesScope cpu(&masm, kInfrastructureCPUFeatures); \
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__ PushCalleeSavedRegisters(); \
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} \
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offset_after_infrastructure_start = masm.GetCursorOffset(); \
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/* Avoid unused-variable warnings in case a test never calls RUN(). */ \
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USE(offset_after_infrastructure_start)
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#define END() \
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offset_before_infrastructure_end = masm.GetCursorOffset(); \
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/* Avoid unused-variable warnings in case a test never calls RUN(). */ \
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USE(offset_before_infrastructure_end); \
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{ \
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CPUFeaturesScope cpu(&masm, kInfrastructureCPUFeatures); \
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core.Dump(&masm); \
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__ PopCalleeSavedRegisters(); \
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} \
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__ Ret(); \
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masm.FinalizeCode()
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// Execute the generated code from the memory area.
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#define RUN() \
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DISASSEMBLE(); \
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VIXL_ASSERT(QUERIED_CAN_RUN()); \
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VIXL_ASSERT(CAN_RUN()); \
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masm.GetBuffer()->SetExecutable(); \
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ExecuteMemory(masm.GetBuffer()->GetStartAddress<byte*>(), \
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masm.GetSizeOfCodeGenerated()); \
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masm.GetBuffer()->SetWritable()
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// This just provides compatibility with VIXL_INCLUDE_SIMULATOR_AARCH64 builds.
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// We cannot run seen-feature checks when running natively.
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#define RUN_WITHOUT_SEEN_FEATURE_CHECK() RUN()
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#endif // ifdef VIXL_INCLUDE_SIMULATOR_AARCH64.
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#define CAN_RUN() CanRun(*masm.GetCPUFeatures(), &queried_can_run)
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#define QUERIED_CAN_RUN() (queried_can_run)
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#define DISASSEMBLE() \
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if (Test::disassemble()) { \
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PrintDisassembler disasm(stdout); \
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CodeBuffer* buffer = masm.GetBuffer(); \
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Instruction* start = buffer->GetOffsetAddress<Instruction*>( \
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offset_after_infrastructure_start); \
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Instruction* end = buffer->GetOffsetAddress<Instruction*>( \
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offset_before_infrastructure_end); \
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\
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if (Test::disassemble_infrastructure()) { \
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Instruction* infra_start = buffer->GetStartAddress<Instruction*>(); \
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printf("# Infrastructure code (prologue)\n"); \
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disasm.DisassembleBuffer(infra_start, start); \
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printf("# Test code\n"); \
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} else { \
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printf( \
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"# Warning: Omitting infrastructure code. " \
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"Use --disassemble to see it.\n"); \
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} \
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\
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disasm.DisassembleBuffer(start, end); \
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\
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if (Test::disassemble_infrastructure()) { \
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printf("# Infrastructure code (epilogue)\n"); \
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Instruction* infra_end = buffer->GetEndAddress<Instruction*>(); \
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disasm.DisassembleBuffer(end, infra_end); \
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} \
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}
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#define ASSERT_EQUAL_NZCV(expected) \
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VIXL_CHECK(EqualNzcv(expected, core.flags_nzcv()))
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#define ASSERT_EQUAL_REGISTERS(expected) \
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VIXL_CHECK(EqualRegisters(&expected, &core))
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#define ASSERT_EQUAL_FP16(expected, result) \
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VIXL_CHECK(EqualFP16(expected, &core, result))
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#define ASSERT_EQUAL_32(expected, result) \
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VIXL_CHECK(Equal32(static_cast<uint32_t>(expected), &core, result))
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#define ASSERT_EQUAL_FP32(expected, result) \
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VIXL_CHECK(EqualFP32(expected, &core, result))
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#define ASSERT_EQUAL_64(expected, result) \
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VIXL_CHECK(Equal64(expected, &core, result))
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#define ASSERT_NOT_EQUAL_64(expected, result) \
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VIXL_CHECK(NotEqual64(expected, &core, result))
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#define ASSERT_EQUAL_FP64(expected, result) \
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VIXL_CHECK(EqualFP64(expected, &core, result))
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#define ASSERT_EQUAL_128(expected_h, expected_l, result) \
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VIXL_CHECK(Equal128(expected_h, expected_l, &core, result))
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#define ASSERT_LITERAL_POOL_SIZE(expected) \
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VIXL_CHECK((expected + kInstructionSize) == (masm.GetLiteralPoolSize()))
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#define ASSERT_EQUAL_SVE_LANE(expected, result, lane) \
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VIXL_CHECK(EqualSVELane(expected, &core, result, lane));
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// If `expected` is scalar, check that every lane of `result` matches it.
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// If `expected` is an array of N expected values, check that the first N
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// lanes on `result` match. The rightmost (highest-indexed) array element maps
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// to the lowest-numbered lane.
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#define ASSERT_EQUAL_SVE(expected, result) \
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VIXL_CHECK(EqualSVE(expected, &core, result, &printed_sve_lane_warning))
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#define ASSERT_EQUAL_MEMORY(expected, result, ...) \
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VIXL_CHECK(EqualMemory(reinterpret_cast<void*>(expected), \
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reinterpret_cast<void*>(result), \
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__VA_ARGS__))
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#define MUST_FAIL_WITH_MESSAGE(code, message) \
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{ \
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bool aborted = false; \
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try { \
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code; \
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} catch (const std::runtime_error& e) { \
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||
|
|
const char* expected_error = message; \
|
||
|
|
size_t error_length = strlen(expected_error); \
|
||
|
|
if (strncmp(expected_error, e.what(), error_length) == 0) { \
|
||
|
|
aborted = true; \
|
||
|
|
} else { \
|
||
|
|
printf("Mismatch in error message.\n"); \
|
||
|
|
printf("Expected: %s\n", expected_error); \
|
||
|
|
printf("Found: %s\n", e.what()); \
|
||
|
|
} \
|
||
|
|
} \
|
||
|
|
VIXL_CHECK(aborted); \
|
||
|
|
}
|
||
|
|
|
||
|
|
} // namespace aarch64
|
||
|
|
} // namespace vixl
|