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75 lines
2.5 KiB
75 lines
2.5 KiB
4 months ago
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/*-
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* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $
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*/
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#pragma once
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#include <sys/types.h>
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__BEGIN_DECLS
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/*
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* The ARM Cortex-A75 registers are described here:
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*
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* AArch64:
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* FPCR: http://infocenter.arm.com/help/topic/com.arm.doc.100403_0200_00_en/lau1442502503726.html
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* FPSR: http://infocenter.arm.com/help/topic/com.arm.doc.100403_0200_00_en/lau1442502526288.html
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* AArch32:
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* FPSCR: http://infocenter.arm.com/help/topic/com.arm.doc.100403_0200_00_en/lau1442504290459.html
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*/
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#if defined(__LP64__)
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typedef struct {
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/* FPCR, Floating-point Control Register. */
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__uint32_t __control;
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/* FPSR, Floating-point Status Register. */
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__uint32_t __status;
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} fenv_t;
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#else
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typedef __uint32_t fenv_t;
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#endif
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typedef __uint32_t fexcept_t;
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/* Exception flags. */
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#define FE_INVALID 0x01
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#define FE_DIVBYZERO 0x02
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#define FE_OVERFLOW 0x04
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#define FE_UNDERFLOW 0x08
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#define FE_INEXACT 0x10
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#define FE_DENORMAL 0x80
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#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW | FE_DENORMAL)
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/* Rounding modes. */
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#define FE_TONEAREST 0x0
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#define FE_UPWARD 0x1
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#define FE_DOWNWARD 0x2
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#define FE_TOWARDZERO 0x3
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__END_DECLS
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