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336 lines
10 KiB
336 lines
10 KiB
4 months ago
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; RUN: llc < %s -march=mips -mcpu=mips2 | FileCheck %s \
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; RUN: -check-prefixes=ALL,M2,M2-M3
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; RUN: llc < %s -march=mips -mcpu=mips32 | FileCheck %s \
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; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R1
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; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s \
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; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
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; RUN: llc < %s -march=mips -mcpu=mips32r3 | FileCheck %s \
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; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
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; RUN: llc < %s -march=mips -mcpu=mips32r5 | FileCheck %s \
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; RUN: -check-prefixes=ALL,CMOV,CMOV-32,CMOV-32R2-R5
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; RUN: llc < %s -march=mips -mcpu=mips32r6 | FileCheck %s \
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; RUN: -check-prefixes=ALL,SEL-32,32R6
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; RUN: llc < %s -march=mips64 -mcpu=mips3 | FileCheck %s \
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; RUN: -check-prefixes=ALL,M3,M2-M3
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; RUN: llc < %s -march=mips64 -mcpu=mips4 | FileCheck %s \
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; RUN: -check-prefixes=ALL,CMOV,CMOV-64
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; RUN: llc < %s -march=mips64 -mcpu=mips64 | FileCheck %s \
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; RUN: -check-prefixes=ALL,CMOV,CMOV-64
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; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s \
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; RUN: -check-prefixes=ALL,CMOV,CMOV-64
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; RUN: llc < %s -march=mips64 -mcpu=mips64r3 | FileCheck %s \
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; RUN: -check-prefixes=ALL,CMOV,CMOV-64
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; RUN: llc < %s -march=mips64 -mcpu=mips64r5 | FileCheck %s \
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; RUN: -check-prefixes=ALL,CMOV,CMOV-64
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; RUN: llc < %s -march=mips64 -mcpu=mips64r6 | FileCheck %s \
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; RUN: -check-prefixes=ALL,SEL-64,64R6
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; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
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; RUN: -check-prefixes=ALL,MM32R3
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; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
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; RUN: -check-prefixes=ALL,MM32R6,SEL-32
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define float @tst_select_i1_float(i1 signext %s, float %x, float %y) {
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entry:
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; ALL-LABEL: tst_select_i1_float:
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; M2-M3: andi $[[T0:[0-9]+]], $4, 1
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; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
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; M2-M3: nop
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; M2: jr $ra
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; M2: mtc1 $6, $f0
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; M3: mov.s $f13, $f14
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; M2-M3: $[[BB0]]:
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; M2-M3: jr $ra
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; M2: mtc1 $5, $f0
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; M3: mov.s $f0, $f13
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; CMOV-32: mtc1 $6, $f0
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; CMOV-32: mtc1 $5, $f1
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; CMOV-32: andi $[[T0:[0-9]+]], $4, 1
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; CMOV-32: movn.s $f0, $f1, $[[T0]]
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; SEL-32: mtc1 $5, $[[F0:f[0-9]+]]
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; SEL-32: mtc1 $6, $[[F1:f[0-9]+]]
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; SEL-32: mtc1 $4, $f0
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; SEL-32: sel.s $f0, $[[F1]], $[[F0]]
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; CMOV-64: andi $[[T0:[0-9]+]], $4, 1
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; CMOV-64: movn.s $f14, $f13, $[[T0]]
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; CMOV-64: mov.s $f0, $f14
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; SEL-64: mtc1 $4, $f0
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; SEL-64: sel.s $f0, $f14, $f13
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; MM32R3: mtc1 $6, $[[F0:f[0-9]+]]
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; MM32R3: mtc1 $5, $[[F1:f[0-9]+]]
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; MM32R3: andi16 $[[T0:[0-9]+]], $4, 1
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; MM32R3: movn.s $f0, $[[F1]], $[[T0]]
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%r = select i1 %s, float %x, float %y
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ret float %r
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}
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define float @tst_select_i1_float_reordered(float %x, float %y,
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i1 signext %s) {
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entry:
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; ALL-LABEL: tst_select_i1_float_reordered:
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; M2-M3: andi $[[T0:[0-9]+]], $6, 1
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; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
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; M2-M3: nop
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; M2: mov.s $f12, $f14
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; M3: mov.s $f12, $f13
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; M2-M3: $[[BB0]]:
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; M2-M3: jr $ra
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; M2-M3: mov.s $f0, $f12
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; CMOV-32: andi $[[T0:[0-9]+]], $6, 1
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; CMOV-32: movn.s $f14, $f12, $[[T0]]
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; CMOV-32: mov.s $f0, $f14
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; SEL-32: mtc1 $6, $f0
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; SEL-32: sel.s $f0, $f14, $f12
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; CMOV-64: andi $[[T0:[0-9]+]], $6, 1
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; CMOV-64: movn.s $f13, $f12, $[[T0]]
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; CMOV-64: mov.s $f0, $f13
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; SEL-64: mtc1 $6, $f0
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; SEL-64: sel.s $f0, $f13, $f12
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; MM32R3: andi16 $[[T0:[0-9]+]], $6, 1
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; MM32R3: movn.s $[[F0:f[0-9]+]], $f12, $[[T0]]
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; MM32R3: mov.s $f0, $[[F0]]
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%r = select i1 %s, float %x, float %y
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ret float %r
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}
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define float @tst_select_fcmp_olt_float(float %x, float %y) {
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entry:
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; ALL-LABEL: tst_select_fcmp_olt_float:
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; M2: c.olt.s $f12, $f14
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; M3: c.olt.s $f12, $f13
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; M2-M3: bc1t $[[BB0:BB[0-9_]+]]
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; M2-M3: nop
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; M2: mov.s $f12, $f14
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; M3: mov.s $f12, $f13
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; M2-M3: $[[BB0]]:
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; M2-M3: jr $ra
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; M2-M3: mov.s $f0, $f12
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; CMOV-32: c.olt.s $f12, $f14
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; CMOV-32: movt.s $f14, $f12, $fcc0
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; CMOV-32: mov.s $f0, $f14
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; SEL-32: cmp.lt.s $f0, $f12, $f14
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; SEL-32: sel.s $f0, $f14, $f12
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; CMOV-64: c.olt.s $f12, $f13
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; CMOV-64: movt.s $f13, $f12, $fcc0
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; CMOV-64: mov.s $f0, $f13
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; SEL-64: cmp.lt.s $f0, $f12, $f13
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; SEL-64: sel.s $f0, $f13, $f12
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; MM32R3: c.olt.s $f12, $f14
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; MM32R3: movt.s $f14, $f12, $fcc0
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; MM32R3: mov.s $f0, $f14
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%s = fcmp olt float %x, %y
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%r = select i1 %s, float %x, float %y
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ret float %r
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}
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define float @tst_select_fcmp_ole_float(float %x, float %y) {
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entry:
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; ALL-LABEL: tst_select_fcmp_ole_float:
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; M2: c.ole.s $f12, $f14
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; M3: c.ole.s $f12, $f13
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; M2-M3: bc1t $[[BB0:BB[0-9_]+]]
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; M2-M3: nop
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; M2: mov.s $f12, $f14
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; M3: mov.s $f12, $f13
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; M2-M3: $[[BB0]]:
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; M2-M3: jr $ra
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; M2-M3: mov.s $f0, $f12
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; CMOV-32: c.ole.s $f12, $f14
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; CMOV-32: movt.s $f14, $f12, $fcc0
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; CMOV-32: mov.s $f0, $f14
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; SEL-32: cmp.le.s $f0, $f12, $f14
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; SEL-32: sel.s $f0, $f14, $f12
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; CMOV-64: c.ole.s $f12, $f13
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; CMOV-64: movt.s $f13, $f12, $fcc0
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; CMOV-64: mov.s $f0, $f13
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; SEL-64: cmp.le.s $f0, $f12, $f13
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; SEL-64: sel.s $f0, $f13, $f12
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; MM32R3: c.ole.s $f12, $f14
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; MM32R3: movt.s $f14, $f12, $fcc0
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; MM32R3: mov.s $f0, $f14
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%s = fcmp ole float %x, %y
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%r = select i1 %s, float %x, float %y
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ret float %r
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}
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define float @tst_select_fcmp_ogt_float(float %x, float %y) {
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entry:
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; ALL-LABEL: tst_select_fcmp_ogt_float:
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; M2: c.ule.s $f12, $f14
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; M3: c.ule.s $f12, $f13
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; M2-M3: bc1f $[[BB0:BB[0-9_]+]]
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; M2-M3: nop
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; M2: mov.s $f12, $f14
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; M3: mov.s $f12, $f13
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; M2-M3: $[[BB0]]:
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; M2-M3: jr $ra
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; M2-M3: mov.s $f0, $f12
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; CMOV-32: c.ule.s $f12, $f14
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; CMOV-32: movf.s $f14, $f12, $fcc0
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; CMOV-32: mov.s $f0, $f14
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; SEL-32: cmp.lt.s $f0, $f14, $f12
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; SEL-32: sel.s $f0, $f14, $f12
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; CMOV-64: c.ule.s $f12, $f13
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; CMOV-64: movf.s $f13, $f12, $fcc0
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; CMOV-64: mov.s $f0, $f13
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; SEL-64: cmp.lt.s $f0, $f13, $f12
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; SEL-64: sel.s $f0, $f13, $f12
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; MM32R3: c.ule.s $f12, $f14
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; MM32R3: movf.s $f14, $f12, $fcc0
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; MM32R3: mov.s $f0, $f14
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%s = fcmp ogt float %x, %y
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%r = select i1 %s, float %x, float %y
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ret float %r
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}
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define float @tst_select_fcmp_oge_float(float %x, float %y) {
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entry:
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; ALL-LABEL: tst_select_fcmp_oge_float:
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; M2: c.ult.s $f12, $f14
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; M3: c.ult.s $f12, $f13
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; M2-M3: bc1f $[[BB0:BB[0-9_]+]]
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; M2-M3: nop
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; M2: mov.s $f12, $f14
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; M3: mov.s $f12, $f13
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; M2-M3: $[[BB0]]:
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; M2-M3: jr $ra
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; M2-M3: mov.s $f0, $f12
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; CMOV-32: c.ult.s $f12, $f14
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; CMOV-32: movf.s $f14, $f12, $fcc0
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; CMOV-32: mov.s $f0, $f14
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; SEL-32: cmp.le.s $f0, $f14, $f12
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; SEL-32: sel.s $f0, $f14, $f12
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; CMOV-64: c.ult.s $f12, $f13
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; CMOV-64: movf.s $f13, $f12, $fcc0
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; CMOV-64: mov.s $f0, $f13
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; SEL-64: cmp.le.s $f0, $f13, $f12
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; SEL-64: sel.s $f0, $f13, $f12
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; MM32R3: c.ult.s $f12, $f14
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; MM32R3: movf.s $f14, $f12, $fcc0
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; MM32R3: mov.s $f0, $f14
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%s = fcmp oge float %x, %y
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%r = select i1 %s, float %x, float %y
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ret float %r
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}
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define float @tst_select_fcmp_oeq_float(float %x, float %y) {
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entry:
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; ALL-LABEL: tst_select_fcmp_oeq_float:
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; M2: c.eq.s $f12, $f14
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; M3: c.eq.s $f12, $f13
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; M2-M3: bc1t $[[BB0:BB[0-9_]+]]
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; M2-M3: nop
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; M2: mov.s $f12, $f14
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; M3: mov.s $f12, $f13
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; M2-M3: $[[BB0]]:
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; M2-M3: jr $ra
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; M2-M3: mov.s $f0, $f12
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; CMOV-32: c.eq.s $f12, $f14
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; CMOV-32: movt.s $f14, $f12, $fcc0
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; CMOV-32: mov.s $f0, $f14
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; SEL-32: cmp.eq.s $f0, $f12, $f14
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; SEL-32: sel.s $f0, $f14, $f12
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; CMOV-64: c.eq.s $f12, $f13
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; CMOV-64: movt.s $f13, $f12, $fcc0
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; CMOV-64: mov.s $f0, $f13
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; SEL-64: cmp.eq.s $f0, $f12, $f13
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; SEL-64: sel.s $f0, $f13, $f12
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; MM32R3: c.eq.s $f12, $f14
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; MM32R3: movt.s $f14, $f12, $fcc0
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; MM32R3: mov.s $f0, $f14
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%s = fcmp oeq float %x, %y
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%r = select i1 %s, float %x, float %y
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ret float %r
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}
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define float @tst_select_fcmp_one_float(float %x, float %y) {
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entry:
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; ALL-LABEL: tst_select_fcmp_one_float:
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; M2: c.ueq.s $f12, $f14
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; M3: c.ueq.s $f12, $f13
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; M2-M3: bc1f $[[BB0:BB[0-9_]+]]
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; M2-M3: nop
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; M2: mov.s $f12, $f14
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; M3: mov.s $f12, $f13
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; M2-M3: $[[BB0]]:
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; M2-M3: jr $ra
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; M2-M3: mov.s $f0, $f12
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; CMOV-32: c.ueq.s $f12, $f14
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; CMOV-32: movf.s $f14, $f12, $fcc0
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; CMOV-32: mov.s $f0, $f14
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; SEL-32: cmp.ueq.s $f0, $f12, $f14
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; SEL-32: mfc1 $[[T0:[0-9]+]], $f0
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; SEL-32: not $[[T0]], $[[T0]]
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; SEL-32: mtc1 $[[T0:[0-9]+]], $f0
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; SEL-32: sel.s $f0, $f14, $f12
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; CMOV-64: c.ueq.s $f12, $f13
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; CMOV-64: movf.s $f13, $f12, $fcc0
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; CMOV-64: mov.s $f0, $f13
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; SEL-64: cmp.ueq.s $f0, $f12, $f13
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; SEL-64: mfc1 $[[T0:[0-9]+]], $f0
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; SEL-64: not $[[T0]], $[[T0]]
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; SEL-64: mtc1 $[[T0:[0-9]+]], $f0
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; SEL-64: sel.s $f0, $f13, $f12
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; MM32R3: c.ueq.s $f12, $f14
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; MM32R3: movf.s $f14, $f12, $fcc0
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; MM32R3: mov.s $f0, $f14
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%s = fcmp one float %x, %y
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%r = select i1 %s, float %x, float %y
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ret float %r
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}
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