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107 lines
3.4 KiB
107 lines
3.4 KiB
4 months ago
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/*
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Copyright (c) 2009, 2010, 2011, 2013 STMicroelectronics
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Written by Christophe Lyon
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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/* Template file for unary operator validation */
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#if defined(__arm__) || defined(__aarch64__)
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#include <arm_neon.h>
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#else
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#include "stm-arm-neon.h"
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#endif
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#include "stm-arm-neon-ref.h"
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void exec_vrev (void)
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{
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/* Basic test: y=vrev(x), then store the result. */
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#define TEST_VREV(Q, T1, T2, W, N, W2) \
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VECT_VAR(vector_res, T1, W, N) = \
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vrev##W2##Q##_##T2##W(VECT_VAR(vector, T1, W, N)); \
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vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
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/* With ARM RVCT, we need to declare variables before any executable
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statement */
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DECL_VARIABLE_ALL_VARIANTS(vector);
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DECL_VARIABLE_ALL_VARIANTS(vector_res);
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clean_results ();
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/* Initialize input "vector" from "buffer" */
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TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
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VLOAD(vector, buffer, , float, f, 32, 2);
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VLOAD(vector, buffer, q, float, f, 32, 4);
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/* Check vrev in each of the existing combinations */
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#define TEST_MSG "VREV16"
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TEST_VREV(, int, s, 8, 8, 16);
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TEST_VREV(, uint, u, 8, 8, 16);
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TEST_VREV(, poly, p, 8, 8, 16);
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TEST_VREV(q, int, s, 8, 16, 16);
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TEST_VREV(q, uint, u, 8, 16, 16);
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TEST_VREV(q, poly, p, 8, 16, 16);
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dump_results_hex (TEST_MSG);
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#undef TEST_MSG
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#define TEST_MSG "VREV32"
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TEST_VREV(, int, s, 8, 8, 32);
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TEST_VREV(, int, s, 16, 4, 32);
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TEST_VREV(, uint, u, 8, 8, 32);
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TEST_VREV(, uint, u, 16, 4, 32);
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TEST_VREV(, poly, p, 8, 8, 32);
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TEST_VREV(, poly, p, 16, 4, 32);
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TEST_VREV(q, int, s, 8, 16, 32);
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TEST_VREV(q, int, s, 16, 8, 32);
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TEST_VREV(q, uint, u, 8, 16, 32);
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TEST_VREV(q, uint, u, 16, 8, 32);
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TEST_VREV(q, poly, p, 8, 16, 32);
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TEST_VREV(q, poly, p, 16, 8, 32);
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dump_results_hex (TEST_MSG);
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#undef TEST_MSG
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#define TEST_MSG "VREV64"
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TEST_VREV(, int, s, 8, 8, 64);
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TEST_VREV(, int, s, 16, 4, 64);
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TEST_VREV(, int, s, 32, 2, 64);
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TEST_VREV(, uint, u, 8, 8, 64);
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TEST_VREV(, uint, u, 16, 4, 64);
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TEST_VREV(, uint, u, 32, 2, 64);
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TEST_VREV(, poly, p, 8, 8, 64);
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TEST_VREV(, poly, p, 16, 4, 64);
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TEST_VREV(q, int, s, 8, 16, 64);
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TEST_VREV(q, int, s, 16, 8, 64);
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TEST_VREV(q, int, s, 32, 4, 64);
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TEST_VREV(q, uint, u, 8, 16, 64);
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TEST_VREV(q, uint, u, 16, 8, 64);
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TEST_VREV(q, uint, u, 32, 4, 64);
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TEST_VREV(q, poly, p, 8, 16, 64);
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TEST_VREV(q, poly, p, 16, 8, 64);
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TEST_VREV(, float, f, 32, 2, 64);
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TEST_VREV(q, float, f, 32, 4, 64);
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dump_results_hex (TEST_MSG);
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}
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