/*
 * Copyright (c) Hisilicon Technologies Co., Ltd. 2019-2019. All rights reserved.
 * Description: header of sif drv
 * Author: Audio
 * Create: 2019-04-16
 */

#ifndef DRV_SIF_H
#define DRV_SIF_H

#include "drv_sif_hal.h"
#include "soc_module.h"
#include "drv_dspreg_sif.h"

#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* __cplusplus */

#define EXT_SIF_ERR   SOC_LOG_LEVEL_ERROR /* error conditions                     */
#define EXT_SIF_EMERG SOC_LOG_LEVEL_FATAL /* system is unusable                   */

#define sif_trace(level, fmt...)                                                           \
    do {                                                                                   \
        soc_trace(level, SOC_ID_SIF, "[func]:%s [line]:%d [info]:", __FUNCTION__, __LINE__); \
        soc_trace(level, SOC_ID_SIF, ##fmt);                                                 \
    } while (0)

typedef enum {
    SIF_CHANNEL_STATUS_STOP = 0,
    SIF_CHANNEL_STATUS_START,
    SIF_CHANNEL_STATUS_CAST_BUTT,
} sif_channel_status;

typedef enum {
    SIF_FREQ_ERR_THRESHOLD_10K = 0x09,
    /* *<freqency error threshold 10K */ /* *<c_ncomment:频率偏移阈值 10K */
    SIF_FREQ_ERR_THRESHOLD_20K = 0x12,
    /* *<freqency error threshold 20K */ /* *<c_ncomment:频率偏移阈值 20K */
    SIF_FREQ_ERR_THRESHOLD_27K = 0x18,
    /* *<freqency error threshold 27K */ /* *<c_ncomment:频率偏移阈值 27K */
    SIF_FREQ_ERR_THRESHOLD_30K = 0x1b,
    /* *<freqency error threshold 30K */ /* *<c_ncomment:频率偏移阈值 30K */
    SIF_FREQ_ERR_THRESHOLD_40K = 0x24,
    /* *<freqency error threshold 40K */ /* *<c_ncomment:频率偏移阈值 40K */
    SIF_FREQ_ERR_THRESHOLD_50K = 0x2c,
    /* *<freqency error threshold 50K */ /* *<c_ncomment:频率偏移阈值 50K */
    SIF_FREQ_ERR_THRESHOLD_BUTT
} sif_freq_err_threshold;

/* device context */
typedef struct {
    td_bool dev_open;
    sif_hal_attr dev_attr; /* device attributes */
    sif_channel_status curn_status;
    ext_sif_attr attr;
    ext_sif_standard_type sif_stand;
    ext_sif_aaos_mode aaos_mode;
    soc_sif_instance asd_drvier;
} sif_drv_ctx;

td_bool sif_check_reserved5_reserved17_compatible(td_void);
td_bool sif_check_reserved9_compatible(td_void);
sif_drv_ctx* get_sif_drv_dev(void);
td_void sif_osal_init(td_void);
td_void sif_osal_deinit(td_void);

#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* __cplusplus */

#endif /* DRV_SIF_H */