/*
 * Copyright (c) Hisilicon Technologies Co., Ltd. 2012-2019. All rights reserved.
 * Description: drv_spread.h
 */

#ifndef __DRV_SPREAD_H__
#define __DRV_SPREAD_H__

#include "td_type.h"

typedef struct {
    td_bool ddr_spread_status;
    td_u32 ddr_spread_div_freq;
    td_u32 ddr_spread_ratio;
    td_u32 ddr_spread_ratio_max;
    td_bool gmac_spread_status;
    td_u32 gmac_spread_div_freq;
    td_u32 gmac_spread_ratio;
    td_u32 gmac_spread_ratio_max;
    td_bool emmc_spread_status;
    td_u32 emmc_spread_div_freq;
    td_u32 emmc_spread_ratio;
    td_u32 emmc_spread_ratio_max;
}spread_proc_info;

td_s32 ext_drv_ss_get_proc_info(spread_proc_info *spread_proc_info);

td_s32 ext_drv_ss_set_ddr_spread_en(td_bool *pb_enable);
td_s32 ext_drv_ss_set_ddr_spread_ratio(td_u32 *pu32_spread_ratio);
td_s32 ext_drv_ss_set_ddr_spread_freq(td_u32 *pu32_spread_freq);
td_s32 ext_drv_ss_set_ddr_max_ratio(td_u32 max_ratio);

td_s32 ext_drv_ss_set_gmac_clk_en(td_bool *pb_enable);
td_s32 ext_drv_ss_set_gmac_spread_en(td_bool *pb_enable);
td_s32 ext_drv_ss_set_gmac_spread_ratio(td_u32 *pu32_spread_ratio);
td_s32 ext_drv_ss_set_gmac_spread_freq(td_u32 *pu32_spread_freq);

td_s32 ext_drv_ss_set_emmc_clk_en(td_bool *pb_enable);
td_s32 ext_drv_ss_set_emmc_spread_en(td_bool *pb_enable);
td_s32 ext_drv_ss_set_emmc_spread_ratio(td_u32 *pu32_spread_ratio);
td_s32 ext_drv_ss_set_emmc_spread_freq(td_u32 *pu32_spread_freq);

td_s32 ext_drv_ss_set_ci_clk_en(td_bool *pb_enable);
#endif /* __DRV_SPREAD_H__ */