#include "dmcu_dbg.h" #include "dmcu_mem.h" #include "soc_log.h" #include "los_dynshm.h" #include "los_memory.h" #include "shcmd.h" #include "proc.h" #include "drv_log.h" #include "los_task_pri.h" #include "shell.h" volatile mcu_dmcu_status *g_mcu_status = (volatile mcu_dmcu_status *)(MCU_CFG_CRG_BASE + MCU_FUN_STA_REG_OFFSET); mcu_dmcu_status *get_mcu_status(td_void) { return (mcu_dmcu_status *)g_mcu_status; } #if DMCU_TEST_VAM DynShmBulkMem g_iommu_text_mem = { 0 }; static td_s32 dmcu_vam_test_phy2vir(UADDR phy_addr, UADDR vir_addr) { UADDR mcu_vir_addr; td_s32 ret = LOS_DynShmAddrTranslate(phy_addr, &mcu_vir_addr, OUTER_VA_TO_INNER_VA); if (ret != TD_SUCCESS) { soc_log_err("LOS_DynShmAddrTranslate fail\n"); return TD_FAILURE; } if (mcu_vir_addr != vir_addr) { soc_log_err("fail, mcu_vir_addr:0x%llx, vir_addr:0x%llx, phy_addr:0x%llx\n", mcu_vir_addr, vir_addr, phy_addr); return TD_FAILURE; } return TD_SUCCESS; } static td_s32 dmcu_vam_test_vir2phy(UADDR phy_addr, UADDR vir_addr) { UADDR smmu_phy_addr; td_s32 ret = LOS_DynShmAddrTranslate(vir_addr, &smmu_phy_addr, INNER_VA_TO_OUTER_VA); if (ret != TD_SUCCESS) { soc_log_err("LOS_DynShmAddrTranslate fail\n"); return TD_FAILURE; } if (smmu_phy_addr != phy_addr) { soc_log_err("fail, smmu_phy_addr:0x%llx, phy_addr:0x%llx, vir_addr:0x%llx\n", smmu_phy_addr, phy_addr, vir_addr); return TD_FAILURE; } return TD_SUCCESS; } static td_s32 dmcu_vam_addr_verify(UADDR phy_addr, UADDR vir_addr, td_u32 value) { UADDR real_addr, real_addr1; td_u32 val, val1; td_s32 ret; *(volatile td_u32 *)(td_u32)(vir_addr) = value; ret = LOS_DynShmAddrTranslate(vir_addr, &real_addr, INNER_VA_TO_MEM_PA); if (ret != TD_SUCCESS) { soc_log_err("LOS_DynShmAddrTranslate fail\n"); return TD_FAILURE; } ret = LOS_DynShmAddrTranslate(phy_addr, &real_addr1, OUTER_VA_TO_MEM_PA); if (ret != TD_SUCCESS) { soc_log_err("LOS_DynShmAddrTranslate fail\n"); return TD_FAILURE; } val = *(volatile td_u32 *)(uintptr_t)(real_addr); val1 = *(volatile td_u32 *)(uintptr_t)(real_addr1); value = *(volatile td_u32 *)(td_u32)(vir_addr); if ((real_addr != real_addr1) || (val != val1) || (val != value)) { soc_log_err("vir2real addr test fail!!! real_addr:0x%llx, real_addr1:0x%llx, val:%x, val1:%x, value:%x\n", real_addr, real_addr1, val, val1, value); return TD_FAILURE; } ret = dmcu_vam_test_phy2vir(phy_addr, vir_addr); ret |= dmcu_vam_test_vir2phy(phy_addr, vir_addr); if (ret != TD_SUCCESS) { soc_log_err("vir2phy addr test fail\n"); return TD_FAILURE; } return TD_SUCCESS; } static td_s32 dmcu_vam_mmap_test(UADDR phy_addr, td_u32 length) { td_u32 vir_addr; td_s32 ret; ret = LOS_DynShmMap(phy_addr, length, DMCU_IOMMU_NOSEC_NOCACHE, &vir_addr); if (ret != TD_SUCCESS) { soc_log_err("LOS_DynShmMap fail, ret:%#x\n", ret); return TD_FAILURE; } ret = dmcu_vam_addr_verify(phy_addr, vir_addr, DMCU_DEFAULT_WRITE_VALUE); if (ret != TD_SUCCESS) { LOS_DynShmUnmap(vir_addr, length); soc_log_err("dmcu_vam_addr_verify fail\n"); return TD_FAILURE; } ret = LOS_DynShmUnmap(vir_addr, length); if (ret != TD_SUCCESS) { soc_log_err("LOS_DynShmUnmap fail\n"); return TD_FAILURE; } return TD_SUCCESS; } static td_s32 dmcu_vam_pool_verify(td_u32 length) { UADDR real_addr; td_s32 ret = TD_SUCCESS; td_s32 max = length / SIZE_8K; for (td_s32 i = 0; i < max - 1; i++) { void *vir_addr = dmcu_pool_mem_malloc(SIZE_8K); if (vir_addr == NULL) { soc_log_err("dmcu_pool_mem_malloc fail\n"); return TD_FAILURE; } *(volatile td_u32 *)(vir_addr) = DMCU_DEFAULT_WRITE_VALUE + i; ret = LOS_DynShmAddrTranslate((UADDR)(UINTPTR)vir_addr, &real_addr, INNER_VA_TO_MEM_PA); if (ret != TD_SUCCESS) { dmcu_pool_mem_free(vir_addr); soc_log_err("LOS_DynShmAddrTranslate fail\n"); return TD_FAILURE; } td_u32 val = *(volatile td_u32 *)(uintptr_t)(real_addr); if (val != DMCU_DEFAULT_WRITE_VALUE + i) { soc_log_err("write val:0x%x, read val:0x%x, vir_addr:%p, real_addr:0x%llx\n", DMCU_DEFAULT_WRITE_VALUE + i, val, vir_addr, real_addr); dmcu_pool_mem_free(vir_addr); return TD_FAILURE; } ret = dmcu_pool_mem_free(vir_addr); if (ret != TD_SUCCESS) { soc_log_err("dmcu_pool_mem_free fail\n"); return TD_FAILURE; } } return TD_SUCCESS; } static td_s32 dmcu_vam_pool_test(UADDR phy_addr, td_u32 length) { UADDR vir_addr; td_s32 ret = dmcu_pool_mem_init(phy_addr, length, DMCU_IOMMU_NOSEC_NOCACHE, &vir_addr); if (ret != TD_SUCCESS) { soc_log_err("dmcu_pool_mem_init fail\n"); return TD_FAILURE; } ret = dmcu_vam_pool_verify(length); if (ret != TD_SUCCESS) { dmcu_pool_mem_deinit(vir_addr, length); soc_log_err("dmcu_vam_pool_verify fail\n"); return TD_FAILURE; } ret = dmcu_pool_mem_deinit(vir_addr, length); if (ret != TD_SUCCESS) { soc_log_err("dmcu_pool_mem_deinit fail\n"); return TD_FAILURE; } return TD_SUCCESS; } static td_s32 dmcu_vam_bulk_test(td_u32 size, td_u32 type) { DynShmBulkMem mem = { 0 }; td_s32 ret = TD_SUCCESS; volatile td_u32 *test_ptr = NULL; mem.size = size; mem.type = type; mem.name = "bulk_test"; void *vir_addr = LOS_DynShmBulkMalloc(&mem); if (vir_addr == NULL) { soc_log_err("LOS_DynShmBulkMalloc fail\n"); return TD_FAILURE; } for (int i = 0; i < size / sizeof(td_u32); i++) { test_ptr = (volatile td_u32 *)(td_u32)(mem.virAddr) + i; *test_ptr = i + 1; soc_log_info("test_ptr[%d]: ptr:%p, val:0x%x\n", i, test_ptr, *test_ptr); } soc_log_info("phyAddr:0x%llx, virAddr:0x%llx\n", mem.phyAddr, mem.virAddr); ret = LOS_DynShmBulkFree(&mem); if (ret != TD_SUCCESS) { soc_log_err("LOS_DynShmBulkFree fail, ret:%x\n", ret); return TD_FAILURE; } return TD_SUCCESS; } static td_void dmcu_iommu_print_help(td_void) { osal_proc_echo( "echo shell iommu_test 0 >/proc/msp/dmcu iommu test help.\n"); osal_proc_echo("echo shell iommu_test 1 0x1000 0 >/proc/msp/dmcu iommu malloc " "test. param1:[1:malloc] param2:[mem_size] param3:[mem_type]\n"); osal_proc_echo("echo shell iommu_test 2 >/proc/msp/dmcu iommu free test. " " param1:[2:free]\n"); osal_proc_echo("echo shell iommu_test 3 phyAddr 0x1000 1 >/proc/msp/dmcu iommu map test. " " param1:[3:map] param2:[mem_addr] param3:[mem_size] param4:[test_count]\n"); osal_proc_echo("echo shell iommu_test 4 phyAddr 0x1000 1 >/proc/msp/dmcu iommu pool test. " " param1:[4:pool] param2:[mem_addr] param3:[mem_size] param4:[test_count]\n"); osal_proc_echo("echo shell iommu_test 5 0x1000 0 1 >/proc/msp/dmcu iommu bulk test. " " param1:[5:bulk] param2:[mem_size] param3:[mem_type] param4:[test_count]\n"); return; } static td_void dmcu_iommu_test_print_help(td_s32 argc, const char **argv) { dmcu_proc_draw_double_line("iommu", PROC_SHELL_LENGTH); dmcu_iommu_print_help(); dmcu_proc_draw_double_line("", PROC_SHELL_LENGTH); return; } static td_void dmcu_iommu_map_test(td_s32 argc, const char **argv) { td_s32 index = 0; td_u32 loop_count = MEM_TEST_DEFAULT_LOOP; td_u32 phyaddr = osal_strtoul(argv[PRARM_1], NULL, 0); td_u32 length = osal_strtoul(argv[PRARM_2], NULL, 0); if (argc == MEM_TEST_ARGC_MAX_LEN) { loop_count = osal_strtoul(argv[PRARM_3], NULL, 0); } for (index = 0; index < loop_count; index++) { td_s32 ret = dmcu_vam_mmap_test(phyaddr, length); if (ret != TD_SUCCESS) { soc_log_err("dmcu_vam_mmap_test fail, loop_count: %d\n", index); return; } } dmcu_proc_draw_double_line("iommu_mmap", PROC_IOMMU_LENGTH); osal_proc_echo("|%-14s :%-10s |%-10s :%-11d |%-10s :0x%-20llx |%-10s :0x%-20llx |\n", "test_status", "success", "loop", index, "phyAddr", g_iommu_text_mem.phyAddr, "virAddr", g_iommu_text_mem.virAddr); dmcu_proc_draw_double_line("", PROC_IOMMU_LENGTH); return; } static td_void dmcu_iommu_pool_test(td_s32 argc, const char **argv) { td_s32 index = 0; td_u32 loop_count = MEM_TEST_DEFAULT_LOOP; td_u32 phyaddr = osal_strtoul(argv[PRARM_1], NULL, 0); td_u32 length = osal_strtoul(argv[PRARM_2], NULL, 0); if (argc == MEM_TEST_ARGC_MAX_LEN) { loop_count = osal_strtoul(argv[PRARM_3], NULL, 0); } for (index = 0; index < loop_count; index++) { td_s32 ret = dmcu_vam_pool_test(phyaddr, length); if (ret != TD_SUCCESS) { soc_log_err("dmcu_vam_pool_test fail, loop_count: %d\n", index); return; } } dmcu_proc_draw_double_line("iommu_pool", PROC_IOMMU_LENGTH); osal_proc_echo("|%-14s :%-10s |%-10s :%-11d |%-10s :0x%-20llx |%-10s :0x%-20llx |\n", "test_status", "success", "loop", index, "phyAddr", g_iommu_text_mem.phyAddr, "virAddr", g_iommu_text_mem.virAddr); dmcu_proc_draw_double_line("", PROC_IOMMU_LENGTH); return; } static td_void dmcu_iommu_bulk_test(td_s32 argc, const char **argv) { td_s32 index = 0; td_u32 loop_count = MEM_TEST_DEFAULT_LOOP; td_s32 ret = TD_SUCCESS; td_u32 size = osal_strtoul(argv[PRARM_1], NULL, 0); td_u32 num = osal_strtoul(argv[PRARM_2], NULL, 0); if (argc == MEM_TEST_ARGC_MAX_LEN) { loop_count = osal_strtoul(argv[PRARM_3], NULL, 0); } for (index = 0; index < loop_count; index++) { ret = dmcu_vam_bulk_test(size, num); if (ret != TD_SUCCESS) { soc_log_err("lite_Vam_test_bulk fail, loop_count: %d\n", index); return; } } dmcu_proc_draw_double_line("iommu_bulk", PROC_IOMMU_LENGTH); osal_proc_echo("|%-14s :%-10s |%-10s :%-11d |%-10s :0x%-20llx |%-10s :0x%-20llx |\n", "test_status", "success", "loop", index, "phyAddr", g_iommu_text_mem.phyAddr, "virAddr", g_iommu_text_mem.virAddr); dmcu_proc_draw_double_line("", PROC_IOMMU_LENGTH); return; } static td_void dmcu_iommu_malloc_test(td_s32 argc, const char **argv) { void *vir_addr = TD_NULL; td_u32 size = osal_strtoul(argv[PRARM_1], NULL, 0); td_u32 type = osal_strtoul(argv[PRARM_2], NULL, 0); if (g_iommu_text_mem.virAddr != 0) { soc_log_err("dmcu iommu has been malloc, Do not malloc repeatedly\n"); return; } g_iommu_text_mem.size = size; g_iommu_text_mem.type = type; g_iommu_text_mem.name = "bulk_test"; vir_addr = LOS_DynShmBulkMalloc(&g_iommu_text_mem); if (vir_addr == NULL) { soc_log_err("LOS_DynShmBulkMalloc fail\n"); return; } dmcu_proc_draw_double_line("iommu_malloc", PROC_IOMMU_LENGTH); osal_proc_echo("|%-14s :%-10s |%-10s :%-11d |%-10s :0x%-20llx |%-10s :0x%-20llx |\n", "test_status", "success", "loop", 1, "phyAddr", g_iommu_text_mem.phyAddr, "virAddr", g_iommu_text_mem.virAddr); dmcu_proc_draw_double_line("", PROC_IOMMU_LENGTH); return; } static td_void dmcu_iommu_free_test(td_s32 argc, const char **argv) { td_s32 ret = TD_SUCCESS; if ((g_iommu_text_mem.virAddr == 0) || (g_iommu_text_mem.phyAddr == 0)) { soc_log_err("LOS_DynShmBulkFree fail, Apply for memory first.\n"); return; } ret = LOS_DynShmBulkFree(&g_iommu_text_mem); if (ret != TD_SUCCESS) { soc_log_err("LOS_DynShmBulkFree fail, ret:%x\n", ret); return; } g_iommu_text_mem.virAddr = 0; dmcu_proc_draw_double_line("iommu_free", PROC_IOMMU_LENGTH); osal_proc_echo("|%-14s :%-10s |%-10s :%-11d |%-10s :0x%-20llx |%-10s :0x%-20x |\n", "test_status", "success", "loop", 1, "phyAddr", g_iommu_text_mem.phyAddr, "virAddr", g_iommu_text_mem.virAddr); dmcu_proc_draw_double_line("", PROC_IOMMU_LENGTH); return; } static dmcu_test_cmd_function g_dmcu_test_cmd_function[] = { {DMCU_CMD_HELP, dmcu_iommu_test_print_help}, {DMCU_CMD_MALLOC, dmcu_iommu_malloc_test}, {DMCU_CMD_FREE, dmcu_iommu_free_test}, {DMCU_CMD_MAP, dmcu_iommu_map_test}, {DMCU_CMD_POOL, dmcu_iommu_pool_test}, {DMCU_CMD_BULK, dmcu_iommu_bulk_test}, }; td_u32 dmcu_iommu_test(td_s32 argc, const char **argv) { td_u32 i; td_u32 cmd_num = sizeof(g_dmcu_test_cmd_function) / sizeof(dmcu_test_cmd_function); if (argc < ARGS_NUM || argv == NULL) { soc_log_err("argc:%d failed \n", argc); dmcu_iommu_test_print_help(argc, argv); return 0; } td_u32 cmd = osal_strtoul(argv[0], NULL, 0); if (cmd < DMCU_CMD_TEST_MAX) { for (i = 0; i < cmd_num; i++) { if (cmd == g_dmcu_test_cmd_function[i].cmd) { g_dmcu_test_cmd_function[i].handler(argc, argv); break; } } } else { soc_log_err("invalid cmd\n"); } return 0; } SHELLCMD_ENTRY(test_shell_cmd, CMD_TYPE_STD, "iommu_test", XARGS, (CmdCallBackFunc)dmcu_iommu_test); /* shell proc */ int dmcu_cmd_proc_read_test(td_void *seqfile, td_void *private) { dmcu_proc_draw_double_line("shell_read", PROC_SHELL_LENGTH); dmcu_proc_draw_double_line("", PROC_SHELL_LENGTH); return TD_SUCCESS; } td_s32 dmcu_cmd_proc_iommu_test(unsigned int argc, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], td_void *private) { UINTPTR user_cmd_para[CMD_PARAM_MAX_COUNT] = { 0 }; for (int i = 0; i < (argc - 1); i++) { user_cmd_para[i] = (UINTPTR)&argv[i + 1]; } dmcu_iommu_test(argc - 1, (const char **)user_cmd_para); return TD_SUCCESS; } td_s32 dmcu_cmd_proc_help(unsigned int argc, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], td_void *private) { dmcu_proc_draw_double_line("shell_help", PROC_SHELL_LENGTH); osal_proc_echo("echo module cmd param1 param2 param3 param4 path explanation\n"); osal_proc_echo("echo shell help >/proc/msp/dmcu\n"); dmcu_iommu_print_help(); osal_proc_echo("echo shell himm addr value >/proc/msp/dmcu memory/reg " "write. param1:[write addr] param2:[write length]\n"); osal_proc_echo("echo shell himd addr length >/proc/msp/dmcu memory/reg read. " " param1:[read addr] param2:[read length]\n"); osal_proc_echo( "echo shell hwi >/proc/msp/dmcu get interrupt info.\n"); osal_proc_echo( "echo shell task >/proc/msp/dmcu get task info.\n"); osal_proc_echo("echo shell task stack task_id >/proc/msp/dmcu get task stack " "info by id. param1:[stack] param2:[task_id]\n"); osal_proc_echo("echo shell task stack all >/proc/msp/dmcu get task stack " "all info. param1:[stack] param2:[all]\n"); osal_proc_echo("echo shell prt2arm 0 >/proc/msp/dmcu set proc print " "to arm. param1:[off: 0 / on: 1]\n"); osal_proc_echo("echo shell proc_info >/proc/msp/dmcu print proc " "register info.\n"); dmcu_proc_draw_double_line("", PROC_SHELL_LENGTH); return TD_SUCCESS; } td_s32 dmcu_cmd_proc_himm(unsigned int argc, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], td_void *private) { if (argc != 3) { /* 3 is param count; cmd + addr + value */ soc_log_err("invalid param himm
\n"); return OS_ERROR; } UINTPTR addr = strtoul(argv[1], NULL, 0); UINT32 value = strtoul(argv[PRARM_2], NULL, 0); if (value < 0 || value > 0xffffffff || addr <= 0) { soc_log_err("Error: Write addr 0x%08x with value 0x%08x\n", addr, value); return OS_ERROR; } WRITE_UINT32(value, addr); osal_proc_echo("Write addr 0x%08x with value 0x%08x\n", addr, value); return TD_SUCCESS; } td_s32 dmcu_cmd_proc_himd(unsigned int argc, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], td_void *private) { if (argc < 2 || argc > 3) { /* 2, 3 is param count; cmd + addr + len */ soc_log_err("invalid param himd
\n"); return OS_ERROR; } UINT32 len = REG_VALUE_LEN; UINTPTR addr = strtoul(argv[1], NULL, 0); if (addr == 0) { soc_log_err("error: Invalid address %d\n", addr); return OS_ERROR; } if (argc == 3) { /* 3 is param count; cmd + addr + len */ len = strtoul(argv[PRARM_2], NULL, 0); } if (len > MD_MAX_LEN || len == 0) { soc_log_err("error: input len is 0 or larger than maxLen %d\n", MD_MAX_LEN); return OS_ERROR; } len = ((len + REG_VALUE_LEN - 1) / REG_VALUE_LEN) * REG_VALUE_LEN; while (len) { osal_proc_echo("0x%x\n", GET_UINT32(addr)); addr += REG_VALUE_LEN; len -= REG_VALUE_LEN; } return TD_SUCCESS; } td_s32 dmcu_cmd_proc_hwi(unsigned int argc, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], td_void *private) { UINTPTR user_cmd_para[CMD_PARAM_MAX_COUNT] = { 0 }; for (int i = 0; i < (argc - 1); i++) { user_cmd_para[i] = (UINTPTR)&argv[i + 1]; } return OsShellCmdHwi(argc - 1, (const char **)user_cmd_para); } #define CMD_PARAM_NUM 3 td_s32 dmcu_cmd_proc_task(unsigned int argc, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], td_void *private) { size_t task_id; CHAR *end_ptr = NULL; if (argc == 1) { task_id = OS_ALL_TASK_MASK; return OsDbgTskInfoGet((UINT32)task_id); } else if (argc == CMD_PARAM_NUM && (strcmp(argv[1], "stack") == 0) && (strcmp(argv[PRARM_2], "all") == 0)) { return LOS_OK; } else if (argc == CMD_PARAM_NUM && (strcmp(argv[1], "stack") == 0)) { task_id = strtoul(argv[1], &end_ptr, 0); if ((*end_ptr != 0) || (task_id >= g_taskMaxNum)) { soc_log_err("\ntask ID can't access %s.\n", argv[1]); return OS_ERROR; } return OsDbgTskInfoGet((UINT32)task_id); } else { dmcu_cmd_proc_help(argc, argv, private); return OS_ERROR; } return TD_SUCCESS; } td_s32 dmcu_proc_get_register_info(td_void) { td_u32 size = 0; td_bool en = 0; proc_entry *entry = dmcu_proc_get_entry_size(&size); if (entry == TD_NULL) { soc_log_err("entry == TD_NULL"); return TD_FAILURE; } dmcu_proc_draw_double_line("proc_info", PROC_LINE_LENGTH); dmcu_proc_get_prt2arm_en(&en); osal_proc_echo("|%-10s :%-10s |%-10s :%-5d |%-10s :%-16s |%-10s :%-14s |\n", "prt2arm", (en == 1 ? "on" : "off"), "", "", "", "", "", ""); for (td_u32 i = 0; i < size; i++) { dmcu_proc_draw_single_line(entry[i].name, PROC_LINE_LENGTH); if (entry[i].entry.cmd_list != TD_NULL) { td_u32 cmd_cnt = entry[i].entry.cmd_cnt; for (td_u32 j = 0; j < cmd_cnt; j++) { osal_proc_echo("|%-10s :%-10s |%-10s :%-5d |%-10s :%-16s |%-10s :%-14s |\n", "name", entry[i].name, "cmd_cnt", cmd_cnt, "write_cmd", entry[i].entry.cmd_list[j].name, "read_cmd", (entry[i].entry.read == TD_NULL ? "invalid" : "valid")); } } else { osal_proc_echo("|%-10s :%-10s |%-10s :%-5d |%-10s :%-16s |%-10s :%-14s |\n", "name", entry[i].name, "cmd_cnt", 0, "write_cmd", "null", "read_cmd", (entry[i].entry.read == TD_NULL ? "invalid" : "valid")); } } dmcu_proc_draw_double_line("", PROC_LINE_LENGTH); return TD_SUCCESS; } td_s32 dmcu_cmd_proc_set_prt2arm_en(unsigned int argc, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], td_void *private) { td_bool en = osal_strtoul(argv[1], NULL, 0) == 0 ? TD_FALSE : TD_TRUE; dmcu_proc_set_prt2arm_en(en); return TD_SUCCESS; } td_s32 dmcu_cmd_proc_get_reg_info(unsigned int argc, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], td_void *private) { return dmcu_proc_get_register_info(); } osal_proc_cmd dmcu_proc_list[] = { {"help", dmcu_cmd_proc_help}, {"iommu_test", dmcu_cmd_proc_iommu_test}, {"himm", dmcu_cmd_proc_himm}, {"himd", dmcu_cmd_proc_himd}, {"hwi", dmcu_cmd_proc_hwi}, {"task", dmcu_cmd_proc_task}, {"prt2arm", dmcu_cmd_proc_set_prt2arm_en}, {"proc_info", dmcu_cmd_proc_get_reg_info} }; td_void dmcu_cmd_shell_proc_init(td_void) { osal_proc_entry_t *entry = TD_NULL; entry = osal_proc_add(DMCU_CMD_NAME_PROC_SHELL, strlen(DMCU_CMD_NAME_PROC_SHELL)); if (entry == TD_NULL) { soc_log_err("osal_proc_add fail\n"); return; } entry->read = dmcu_cmd_proc_read_test; entry->cmd_list = dmcu_proc_list; entry->cmd_cnt = sizeof(dmcu_proc_list) / sizeof(osal_proc_cmd); entry->private = TD_NULL; } /* log proc */ td_void dmcu_log_prt_log_info(td_void) { td_s32 i; td_u32 level_num = 0; td_char **debug_level_name = drv_log_get_level_name(&level_num); td_u32 mod_num = drv_log_get_mod_num(); log_cfg_info *log_cfg_info = drv_log_get_cfg_info(); osal_proc_echo("| %-32s | %-63s |\n", "Log_module", "Level"); for (i = 0; i < mod_num; i++) { osal_proc_echo("| %-32s | %d (%-6s) |\n", log_cfg_info[i].module_name, log_cfg_info[i].log_level, debug_level_name[log_cfg_info[i].log_level]); } dmcu_proc_draw_single_line("dmcu_log_level", PROC_LINE_LENGTH); osal_proc_echo("| %-32s | %-63s |\n", "level_name", "level_val"); for (i = 0; i < level_num - 1; i++) { osal_proc_echo("| %-32s | %-63d |\n", debug_level_name[i], i); } } td_s32 dmcu_cmd_proc_log_help(unsigned int argc, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], td_void *private) { dmcu_proc_draw_double_line("dmcu_log_help", PROC_LOG_LENGTH); osal_proc_echo("echo module cmd param1 param2 path explanation \n"); osal_proc_echo("echo log > /proc/msp/dmcu get log info. \n"); osal_proc_echo("echo log help > /proc/msp/dmcu print log cmd list. \n"); osal_proc_echo("echo log dbg_log2cpu > /proc/msp/dmcu get log debug info. \n"); osal_proc_echo("echo log set_log_level dmcu 2 > /proc/msp/dmcu set log level. param1: " "[sys/dmcu/pq/vo/win/memc/gfbg/panel/all], param2: [0, 7] \n"); dmcu_proc_draw_double_line("", PROC_LOG_LENGTH); return TD_SUCCESS; } td_s32 drv_log_info_read(td_void *seqfile, td_void *private) { dmcu_proc_draw_double_line("dmcu_log_info", PROC_LINE_LENGTH); dmcu_log_prt_log_info(); dmcu_proc_draw_double_line("", PROC_LINE_LENGTH); return TD_SUCCESS; } td_s32 drv_log_output2cpu_dbg(unsigned int argc, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], td_void *private) { td_bool log2arm = drv_log_get_log2arm(); mdc_log_option *option = (mdc_log_option *)DMCU_LOG_START_ADDR; if (option == TD_NULL) { return TD_FAILURE; } soc_log_err("log debug\n"); dmcu_proc_draw_double_line("dmcu_log_dbg", PROC_LINE_LENGTH); osal_proc_echo("| %-32s %-64s |\n", "name", "value"); osal_proc_echo("| %-32s :%-63s |\n", "log2arm", (log2arm == TD_TRUE ? "enable" : "disable")); osal_proc_echo("| %-32s :%-63d |\n", "msg_num", option->msg_num); osal_proc_echo("| %-32s :%-63d |\n", "msg_size", option->msg_size); osal_proc_echo("| %-32s :%-63d |\n", "write_tail", option->write_tail); osal_proc_echo("| %-32s :%-63d |\n", "read_head", option->read_head); osal_proc_echo("| %-32s :0x%-61x |\n", "write_addr", DMCU_LOG_START_ADDR + option->write_tail); dmcu_proc_draw_double_line("", PROC_LINE_LENGTH); return TD_SUCCESS; } td_s32 dmcu_cmd_proc_set_log_level(unsigned int argc, char (*argv)[PROC_CMD_SINGEL_LENGTH_MAX], td_void *private) { td_char module_name[NAME_MAX_LEN] = {0}; td_u32 level = osal_strtoul(argv[PRARM_2], NULL, 0); if (argc != 3) { /* 3 is param count */ soc_log_err("argc=%u, argc should = 3, is error!\n", argc); return TD_FAILURE; } if (argv[1] != TD_NULL) { if (memcpy_s(module_name, NAME_MAX_LEN, argv[1], PROC_CMD_SINGEL_LENGTH_MAX) != TD_SUCCESS) { soc_log_err("get module_name fail\n"); dmcu_cmd_proc_log_help(argc, argv, private); return TD_FAILURE; } } td_s32 ret = soc_log_set_level_by_name(module_name, strlen(module_name), level); if (ret != TD_SUCCESS) { soc_log_err("set log level fail\n"); dmcu_cmd_proc_log_help(argc, argv, private); return TD_FAILURE; } dmcu_proc_draw_double_line("dmcu_log_info", PROC_LINE_LENGTH); dmcu_log_prt_log_info(); dmcu_proc_draw_double_line("", PROC_LINE_LENGTH); return TD_SUCCESS; } osal_proc_cmd dmcu_log_proc_list[] = { {"help", dmcu_cmd_proc_log_help}, {"dbg_log2cpu", drv_log_output2cpu_dbg}, {"set_log_level", dmcu_cmd_proc_set_log_level}, }; td_void dmcu_cmd_log_proc_init(td_void) { osal_proc_entry_t *entry = TD_NULL; entry = osal_proc_add(DMCU_CMD_NAME_PROC_LOG, strlen(DMCU_CMD_NAME_PROC_LOG)); if (entry == TD_NULL) { soc_log_err("osal_proc_add fail\n"); return; } entry->read = drv_log_info_read; entry->cmd_list = dmcu_log_proc_list; entry->cmd_cnt = sizeof(dmcu_log_proc_list) / sizeof(osal_proc_cmd); entry->private = TD_NULL; } td_s32 dmcu_dbg_init(td_void) { dmcu_cmd_shell_proc_init(); dmcu_cmd_log_proc_init(); return TD_FAILURE; } #endif