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130 lines
3.4 KiB
130 lines
3.4 KiB
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef MLX4_ABI_USER_H
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#define MLX4_ABI_USER_H
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#include <linux/types.h>
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#define MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION 3
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#define MLX4_IB_UVERBS_ABI_VERSION 4
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struct mlx4_ib_alloc_ucontext_resp_v3 {
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__u32 qp_tab_size;
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__u16 bf_reg_size;
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__u16 bf_regs_per_page;
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};
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enum {
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MLX4_USER_DEV_CAP_LARGE_CQE = 1L << 0,
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};
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struct mlx4_ib_alloc_ucontext_resp {
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__u32 dev_caps;
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__u32 qp_tab_size;
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__u16 bf_reg_size;
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__u16 bf_regs_per_page;
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__u32 cqe_size;
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};
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struct mlx4_ib_alloc_pd_resp {
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__u32 pdn;
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__u32 reserved;
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};
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struct mlx4_ib_create_cq {
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__aligned_u64 buf_addr;
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__aligned_u64 db_addr;
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};
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struct mlx4_ib_create_cq_resp {
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__u32 cqn;
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__u32 reserved;
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};
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struct mlx4_ib_resize_cq {
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__aligned_u64 buf_addr;
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};
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struct mlx4_ib_create_srq {
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__aligned_u64 buf_addr;
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__aligned_u64 db_addr;
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};
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struct mlx4_ib_create_srq_resp {
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__u32 srqn;
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__u32 reserved;
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};
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struct mlx4_ib_create_qp_rss {
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__aligned_u64 rx_hash_fields_mask;
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__u8 rx_hash_function;
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__u8 reserved[7];
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__u8 rx_hash_key[40];
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__u32 comp_mask;
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__u32 reserved1;
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};
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struct mlx4_ib_create_qp {
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__aligned_u64 buf_addr;
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__aligned_u64 db_addr;
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__u8 log_sq_bb_count;
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__u8 log_sq_stride;
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__u8 sq_no_prefetch;
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__u8 reserved;
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__u32 inl_recv_sz;
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};
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struct mlx4_ib_create_wq {
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__aligned_u64 buf_addr;
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__aligned_u64 db_addr;
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__u8 log_range_size;
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__u8 reserved[3];
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__u32 comp_mask;
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};
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struct mlx4_ib_modify_wq {
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__u32 comp_mask;
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__u32 reserved;
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};
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struct mlx4_ib_create_rwq_ind_tbl_resp {
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__u32 response_length;
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__u32 reserved;
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};
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enum mlx4_ib_rx_hash_function_flags {
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MLX4_IB_RX_HASH_FUNC_TOEPLITZ = 1 << 0,
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};
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enum mlx4_ib_rx_hash_fields {
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MLX4_IB_RX_HASH_SRC_IPV4 = 1 << 0,
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MLX4_IB_RX_HASH_DST_IPV4 = 1 << 1,
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MLX4_IB_RX_HASH_SRC_IPV6 = 1 << 2,
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MLX4_IB_RX_HASH_DST_IPV6 = 1 << 3,
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MLX4_IB_RX_HASH_SRC_PORT_TCP = 1 << 4,
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MLX4_IB_RX_HASH_DST_PORT_TCP = 1 << 5,
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MLX4_IB_RX_HASH_SRC_PORT_UDP = 1 << 6,
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MLX4_IB_RX_HASH_DST_PORT_UDP = 1 << 7,
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MLX4_IB_RX_HASH_INNER = 1ULL << 31,
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};
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struct mlx4_ib_rss_caps {
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__aligned_u64 rx_hash_fields_mask;
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__u8 rx_hash_function;
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__u8 reserved[7];
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};
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enum query_device_resp_mask {
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MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET = 1UL << 0,
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};
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struct mlx4_ib_tso_caps {
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__u32 max_tso;
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__u32 supported_qpts;
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};
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struct mlx4_uverbs_ex_query_device_resp {
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__u32 comp_mask;
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__u32 response_length;
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__aligned_u64 hca_core_clock_offset;
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__u32 max_inl_recv_sz;
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__u32 reserved;
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struct mlx4_ib_rss_caps rss_caps;
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struct mlx4_ib_tso_caps tso_caps;
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};
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#endif
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