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239 lines
8.6 KiB
239 lines
8.6 KiB
/*
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Copyright (c) 2009, 2010, 2011 STMicroelectronics
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Written by Christophe Lyon
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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#if defined(__arm__) || defined(__aarch64__)
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#include <arm_neon.h>
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#else
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#include "stm-arm-neon.h"
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#endif
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#include "stm-arm-neon-ref.h"
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#define TEST_MSG "VRSRA_N"
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void exec_vrsra_n (void)
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{
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/* Basic test: y=vrsra_n(x,v), then store the result. */
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#define TEST_VRSRA_N(Q, T1, T2, W, N, V) \
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VECT_VAR(vector_res, T1, W, N) = \
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vrsra##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \
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VECT_VAR(vector2, T1, W, N), \
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V); \
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vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
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/* With ARM RVCT, we need to declare variables before any executable
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statement */
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DECL_VARIABLE_ALL_VARIANTS(vector);
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DECL_VARIABLE_ALL_VARIANTS(vector2);
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DECL_VARIABLE_ALL_VARIANTS(vector_res);
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clean_results ();
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/* Initialize input "vector" from "buffer" */
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TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
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/* Choose arbitrary initialization values */
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VDUP(vector2, , int, s, 8, 8, 0x11);
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VDUP(vector2, , int, s, 16, 4, 0x22);
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VDUP(vector2, , int, s, 32, 2, 0x33);
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VDUP(vector2, , int, s, 64, 1, 0x44);
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VDUP(vector2, , uint, u, 8, 8, 0x55);
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VDUP(vector2, , uint, u, 16, 4, 0x66);
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VDUP(vector2, , uint, u, 32, 2, 0x77);
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VDUP(vector2, , uint, u, 64, 1, 0x88);
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VDUP(vector2, q, int, s, 8, 16, 0x11);
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VDUP(vector2, q, int, s, 16, 8, 0x22);
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VDUP(vector2, q, int, s, 32, 4, 0x33);
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VDUP(vector2, q, int, s, 64, 2, 0x44);
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VDUP(vector2, q, uint, u, 8, 16, 0x55);
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VDUP(vector2, q, uint, u, 16, 8, 0x66);
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VDUP(vector2, q, uint, u, 32, 4, 0x77);
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VDUP(vector2, q, uint, u, 64, 2, 0x88);
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/* Choose shift amount arbitrarily */
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TEST_VRSRA_N(, int, s, 8, 8, 1);
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TEST_VRSRA_N(, int, s, 16, 4, 12);
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TEST_VRSRA_N(, int, s, 32, 2, 2);
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TEST_VRSRA_N(, int, s, 64, 1, 32);
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TEST_VRSRA_N(, uint, u, 8, 8, 2);
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TEST_VRSRA_N(, uint, u, 16, 4, 3);
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TEST_VRSRA_N(, uint, u, 32, 2, 5);
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TEST_VRSRA_N(, uint, u, 64, 1, 33);
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TEST_VRSRA_N(q, int, s, 8, 16, 1);
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TEST_VRSRA_N(q, int, s, 16, 8, 12);
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TEST_VRSRA_N(q, int, s, 32, 4, 2);
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TEST_VRSRA_N(q, int, s, 64, 2, 32);
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TEST_VRSRA_N(q, uint, u, 8, 16, 2);
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TEST_VRSRA_N(q, uint, u, 16, 8, 3);
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TEST_VRSRA_N(q, uint, u, 32, 4, 5);
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TEST_VRSRA_N(q, uint, u, 64, 2, 33);
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/* FIXME: only a few result buffers are used, but we output all of them */
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dump_results_hex (TEST_MSG);
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/* Initialize the accumulator with 0 */
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VDUP(vector, , int, s, 8, 8, 0);
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VDUP(vector, , int, s, 16, 4, 0);
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VDUP(vector, , int, s, 32, 2, 0);
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VDUP(vector, , int, s, 64, 1, 0);
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VDUP(vector, , uint, u, 8, 8, 0);
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VDUP(vector, , uint, u, 16, 4, 0);
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VDUP(vector, , uint, u, 32, 2, 0);
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VDUP(vector, , uint, u, 64, 1, 0);
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VDUP(vector, q, int, s, 8, 16, 0);
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VDUP(vector, q, int, s, 16, 8, 0);
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VDUP(vector, q, int, s, 32, 4, 0);
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VDUP(vector, q, int, s, 64, 2, 0);
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VDUP(vector, q, uint, u, 8, 16, 0);
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VDUP(vector, q, uint, u, 16, 8, 0);
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VDUP(vector, q, uint, u, 32, 4, 0);
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VDUP(vector, q, uint, u, 64, 2, 0);
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/* Initialize with max values to check overflow */
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VDUP(vector2, , int, s, 8, 8, 0x7F);
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VDUP(vector2, , int, s, 16, 4, 0x7FFF);
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VDUP(vector2, , int, s, 32, 2, 0x7FFFFFFF);
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VDUP(vector2, , int, s, 64, 1, 0x7FFFFFFFFFFFFFFFLL);
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VDUP(vector2, , uint, u, 8, 8, 0xFF);
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VDUP(vector2, , uint, u, 16, 4, 0xFFFF);
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VDUP(vector2, , uint, u, 32, 2, 0xFFFFFFFF);
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VDUP(vector2, , uint, u, 64, 1, 0xFFFFFFFFFFFFFFFFULL);
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VDUP(vector2, q, int, s, 8, 16, 0x7F);
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VDUP(vector2, q, int, s, 16, 8, 0x7FFF);
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VDUP(vector2, q, int, s, 32, 4, 0x7FFFFFFF);
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VDUP(vector2, q, int, s, 64, 2, 0x7FFFFFFFFFFFFFFFLL);
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VDUP(vector2, q, uint, u, 8, 16, 0xFF);
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VDUP(vector2, q, uint, u, 16, 8, 0xFFFF);
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VDUP(vector2, q, uint, u, 32, 4, 0xFFFFFFFF);
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VDUP(vector2, q, uint, u, 64, 2, 0xFFFFFFFFFFFFFFFFULL);
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/* Shift by 1 to check overflow with rounding constant */
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TEST_VRSRA_N(, int, s, 8, 8, 1);
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TEST_VRSRA_N(, int, s, 16, 4, 1);
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TEST_VRSRA_N(, int, s, 32, 2, 1);
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TEST_VRSRA_N(, int, s, 64, 1, 1);
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TEST_VRSRA_N(, uint, u, 8, 8, 1);
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TEST_VRSRA_N(, uint, u, 16, 4, 1);
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TEST_VRSRA_N(, uint, u, 32, 2, 1);
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TEST_VRSRA_N(, uint, u, 64, 1, 1);
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TEST_VRSRA_N(q, int, s, 8, 16, 1);
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TEST_VRSRA_N(q, int, s, 16, 8, 1);
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TEST_VRSRA_N(q, int, s, 32, 4, 1);
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TEST_VRSRA_N(q, int, s, 64, 2, 1);
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TEST_VRSRA_N(q, uint, u, 8, 16, 1);
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TEST_VRSRA_N(q, uint, u, 16, 8, 1);
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TEST_VRSRA_N(q, uint, u, 32, 4, 1);
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TEST_VRSRA_N(q, uint, u, 64, 2, 1);
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dump_results_hex2 (TEST_MSG, " (checking overflow: shift by 1, positive input)");
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/* Shift by 3 to check overflow with rounding constant */
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TEST_VRSRA_N(, int, s, 8, 8, 3);
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TEST_VRSRA_N(, int, s, 16, 4, 3);
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TEST_VRSRA_N(, int, s, 32, 2, 3);
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TEST_VRSRA_N(, int, s, 64, 1, 3);
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TEST_VRSRA_N(, uint, u, 8, 8, 3);
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TEST_VRSRA_N(, uint, u, 16, 4, 3);
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TEST_VRSRA_N(, uint, u, 32, 2, 3);
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TEST_VRSRA_N(, uint, u, 64, 1, 3);
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TEST_VRSRA_N(q, int, s, 8, 16, 3);
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TEST_VRSRA_N(q, int, s, 16, 8, 3);
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TEST_VRSRA_N(q, int, s, 32, 4, 3);
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TEST_VRSRA_N(q, int, s, 64, 2, 3);
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TEST_VRSRA_N(q, uint, u, 8, 16, 3);
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TEST_VRSRA_N(q, uint, u, 16, 8, 3);
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TEST_VRSRA_N(q, uint, u, 32, 4, 3);
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TEST_VRSRA_N(q, uint, u, 64, 2, 3);
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dump_results_hex2 (TEST_MSG, " (checking overflow: shift by 3, positive input)");
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/* Shift by max to check overflow with rounding constant */
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TEST_VRSRA_N(, int, s, 8, 8, 8);
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TEST_VRSRA_N(, int, s, 16, 4, 16);
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TEST_VRSRA_N(, int, s, 32, 2, 32);
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TEST_VRSRA_N(, int, s, 64, 1, 64);
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TEST_VRSRA_N(, uint, u, 8, 8, 8);
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TEST_VRSRA_N(, uint, u, 16, 4, 16);
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TEST_VRSRA_N(, uint, u, 32, 2, 32);
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TEST_VRSRA_N(, uint, u, 64, 1, 64);
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TEST_VRSRA_N(q, int, s, 8, 16, 8);
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TEST_VRSRA_N(q, int, s, 16, 8, 16);
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TEST_VRSRA_N(q, int, s, 32, 4, 32);
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TEST_VRSRA_N(q, int, s, 64, 2, 64);
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TEST_VRSRA_N(q, uint, u, 8, 16, 8);
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TEST_VRSRA_N(q, uint, u, 16, 8, 16);
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TEST_VRSRA_N(q, uint, u, 32, 4, 32);
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TEST_VRSRA_N(q, uint, u, 64, 2, 64);
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dump_results_hex2 (TEST_MSG, " (checking overflow: shift by max, positive input)");
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/* Initialize with min values to check overflow */
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VDUP(vector2, , int, s, 8, 8, 0x80);
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VDUP(vector2, , int, s, 16, 4, 0x8000);
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VDUP(vector2, , int, s, 32, 2, 0x80000000);
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VDUP(vector2, , int, s, 64, 1, 0x8000000000000000LL);
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VDUP(vector2, q, int, s, 8, 16, 0x80);
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VDUP(vector2, q, int, s, 16, 8, 0x8000);
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VDUP(vector2, q, int, s, 32, 4, 0x80000000);
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VDUP(vector2, q, int, s, 64, 2, 0x8000000000000000ULL);
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/* Shift by 1 to check overflow with rounding constant */
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TEST_VRSRA_N(, int, s, 8, 8, 1);
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TEST_VRSRA_N(, int, s, 16, 4, 1);
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TEST_VRSRA_N(, int, s, 32, 2, 1);
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TEST_VRSRA_N(, int, s, 64, 1, 1);
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TEST_VRSRA_N(q, int, s, 8, 16, 1);
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TEST_VRSRA_N(q, int, s, 16, 8, 1);
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TEST_VRSRA_N(q, int, s, 32, 4, 1);
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TEST_VRSRA_N(q, int, s, 64, 2, 1);
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dump_results_hex2 (TEST_MSG, " (checking overflow: shift by 1, negative input)");
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/* Shift by 3 to check overflow with rounding constant */
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TEST_VRSRA_N(, int, s, 8, 8, 3);
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TEST_VRSRA_N(, int, s, 16, 4, 3);
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TEST_VRSRA_N(, int, s, 32, 2, 3);
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TEST_VRSRA_N(, int, s, 64, 1, 3);
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TEST_VRSRA_N(q, int, s, 8, 16, 3);
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TEST_VRSRA_N(q, int, s, 16, 8, 3);
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TEST_VRSRA_N(q, int, s, 32, 4, 3);
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TEST_VRSRA_N(q, int, s, 64, 2, 3);
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dump_results_hex2 (TEST_MSG, " (checking overflow: shift by max, negative input)");
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/* Shift by max to check overflow with rounding constant */
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TEST_VRSRA_N(, int, s, 8, 8, 8);
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TEST_VRSRA_N(, int, s, 16, 4, 16);
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TEST_VRSRA_N(, int, s, 32, 2, 32);
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TEST_VRSRA_N(, int, s, 64, 1, 64);
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TEST_VRSRA_N(q, int, s, 8, 16, 8);
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TEST_VRSRA_N(q, int, s, 16, 8, 16);
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TEST_VRSRA_N(q, int, s, 32, 4, 32);
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TEST_VRSRA_N(q, int, s, 64, 2, 64);
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dump_results_hex2 (TEST_MSG, " (checking overflow: shift by max, negative input)");
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}
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