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99 lines
3.4 KiB
99 lines
3.4 KiB
/*
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Copyright (c) 2009, 2010, 2011 STMicroelectronics
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Written by Christophe Lyon
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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*/
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#if defined(__arm__) || defined(__aarch64__)
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#include <arm_neon.h>
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#else
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#include "stm-arm-neon.h"
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#endif
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#include "stm-arm-neon-ref.h"
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#define TEST_MSG "VSHL/VSHLQ"
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void exec_vshl (void)
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{
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/* Basic test: v3=vshl(v1,v2), then store the result. */
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#define TEST_VSHL(T3, Q, T1, T2, W, N) \
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VECT_VAR(vector_res, T1, W, N) = \
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vshl##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \
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VECT_VAR(vector_shift, T3, W, N)); \
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vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
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/* With ARM RVCT, we need to declare variables before any executable
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statement */
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DECL_VARIABLE_ALL_VARIANTS(vector);
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DECL_VARIABLE_ALL_VARIANTS(vector_res);
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DECL_VARIABLE_SIGNED_VARIANTS(vector_shift);
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clean_results ();
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/* Initialize input "vector" from "buffer" */
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TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
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/* Choose init value arbitrarily, will be used as shift amount */
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VDUP(vector_shift, , int, s, 8, 8, 1);
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VDUP(vector_shift, , int, s, 16, 4, 3);
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VDUP(vector_shift, , int, s, 32, 2, 8);
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VDUP(vector_shift, , int, s, 64, 1, 3);
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VDUP(vector_shift, q, int, s, 8, 16, 5);
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VDUP(vector_shift, q, int, s, 16, 8, 12);
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VDUP(vector_shift, q, int, s, 32, 4, 30);
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VDUP(vector_shift, q, int, s, 64, 2, 63);
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TEST_MACRO_ALL_VARIANTS_1_5(TEST_VSHL, int);
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dump_results_hex (TEST_MSG);
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/* Test large shift amount */
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VDUP(vector_shift, , int, s, 8, 8, 8);
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VDUP(vector_shift, , int, s, 16, 4, 16);
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VDUP(vector_shift, , int, s, 32, 2, 32);
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VDUP(vector_shift, , int, s, 64, 1, 64);
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VDUP(vector_shift, q, int, s, 8, 16, 8);
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VDUP(vector_shift, q, int, s, 16, 8, 17);
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VDUP(vector_shift, q, int, s, 32, 4, 33);
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VDUP(vector_shift, q, int, s, 64, 2, 65);
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TEST_MACRO_ALL_VARIANTS_1_5(TEST_VSHL, int);
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dump_results_hex2 (TEST_MSG, " (large shift amount)");
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/* Test negative shift amount */
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VDUP(vector_shift, , int, s, 8, 8, -1);
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VDUP(vector_shift, , int, s, 16, 4, -1);
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VDUP(vector_shift, , int, s, 32, 2, -2);
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VDUP(vector_shift, , int, s, 64, 1, -4);
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VDUP(vector_shift, q, int, s, 8, 16, -2);
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VDUP(vector_shift, q, int, s, 16, 8, -5);
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VDUP(vector_shift, q, int, s, 32, 4, -3);
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VDUP(vector_shift, q, int, s, 64, 2, -5);
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TEST_MACRO_ALL_VARIANTS_1_5(TEST_VSHL, int);
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dump_results_hex2 (TEST_MSG, " (negative shift amount)");
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}
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