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159 lines
6.1 KiB
159 lines
6.1 KiB
TF-A Porting Guide for Marvell Platforms
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========================================
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This section describes how to port TF-A to a customer board, assuming that the
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SoC being used is already supported in TF-A.
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Source Code Structure
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---------------------
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- The customer platform specific code shall reside under ``plat/marvell/armada/<soc family>/<soc>_cust``
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(e.g. 'plat/marvell/armada/a8k/a7040_cust').
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- The platform name for build purposes is called ``<soc>_cust`` (e.g. ``a7040_cust``).
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- The build system will reuse all files from within the soc directory, and take only the porting
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files from the customer platform directory.
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Files that require porting are located at ``plat/marvell/armada/<soc family>/<soc>_cust`` directory.
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Armada-70x0/Armada-80x0 Porting
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-------------------------------
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SoC Physical Address Map (marvell_plat_config.c)
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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This file describes the SoC physical memory mapping to be used for the CCU,
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IOWIN, AXI-MBUS and IOB address decode units (Refer to the functional spec for
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more details).
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In most cases, using the default address decode windows should work OK.
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In cases where a special physical address map is needed (e.g. Special size for
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PCIe MEM windows, large memory mapped SPI flash...), then porting of the SoC
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memory map is required.
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.. note::
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For a detailed information on how CCU, IOWIN, AXI-MBUS & IOB work, please
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refer to the SoC functional spec, and under
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``docs/plat/marvell/armada/misc/mvebu-[ccu/iob/amb/io-win].rst`` files.
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boot loader recovery (marvell_plat_config.c)
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- Background:
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Boot rom can skip the current image and choose to boot from next position if a
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specific value (``0xDEADB002``) is returned by the ble main function. This
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feature is used for boot loader recovery by booting from a valid flash-image
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saved in next position on flash (e.g. address 2M in SPI flash).
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Supported options to implement the skip request are:
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- GPIO
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- I2C
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- User defined
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- Porting:
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Under marvell_plat_config.c, implement struct skip_image that includes
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specific board parameters.
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.. warning::
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To disable this feature make sure the struct skip_image is not implemented.
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- Example:
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In A7040-DB specific implementation
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(``plat/marvell/armada/a8k/a70x0/board/marvell_plat_config.c``), the image skip is
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implemented using GPIO: mpp 33 (SW5).
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Before resetting the board make sure there is a valid image on the next flash
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address:
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-tftp [valid address] flash-image.bin
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-sf update [valid address] 0x2000000 [size]
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Press reset and keep pressing the button connected to the chosen GPIO pin. A
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skip image request message is printed on the screen and boot rom boots from the
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saved image at the next position.
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DDR Porting (dram_port.c)
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~~~~~~~~~~~~~~~~~~~~~~~~~
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This file defines the dram topology and parameters of the target board.
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The DDR code is part of the BLE component, which is an extension of ARM Trusted
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Firmware (TF-A).
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The DDR driver called mv_ddr is released separately apart from TF-A sources.
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The BLE and consequently, the DDR init code is executed at the early stage of
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the boot process.
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Each supported platform of the TF-A has its own DDR porting file called
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dram_port.c located at ``atf/plat/marvell/armada/a8k/<platform>/board`` directory.
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Please refer to '<path_to_mv_ddr_sources>/doc/porting_guide.txt' for detailed
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porting description.
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The build target directory is "build/<platform>/release/ble".
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Comphy Porting (phy-porting-layer.h or phy-default-porting-layer.h)
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- Background:
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Some of the comphy's parameters value depend on the HW connection between
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the SoC and the PHY. Every board type has specific HW characteristics like
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wire length. Due to those differences some comphy parameters vary between
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board types. Therefore each board type can have its own list of values for
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all relevant comphy parameters. The PHY porting layer specifies which
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parameters need to be suited and the board designer should provide relevant
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values.
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The PHY porting layer simplifies updating static values per board type,
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which are now grouped in one place.
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.. note::
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The parameters for the same type of comphy may vary even for the same
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board type, it is because the lanes from comphy-x to some PHY may have
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different HW characteristic than lanes from comphy-y to the same
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(multiplexed) or other PHY.
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- Porting:
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The porting layer for PHY was introduced in TF-A. There is one file
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``drivers/marvell/comphy/phy-default-porting-layer.h`` which contains the
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defaults. Those default parameters are used only if there is no appropriate
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phy-porting-layer.h file under: ``plat/marvell/armada/<soc
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family>/<platform>/board/phy-porting-layer.h``. If the phy-porting-layer.h
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exists, the phy-default-porting-layer.h is not going to be included.
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.. warning::
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Not all comphy types are already reworked to support the PHY porting
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layer, currently the porting layer is supported for XFI/SFI and SATA
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comphy types.
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The easiest way to prepare the PHY porting layer for custom board is to copy
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existing example to a new platform:
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- cp ``plat/marvell/armada/a8k/a80x0/board/phy-porting-layer.h`` "plat/marvell/armada/<soc family>/<platform>/board/phy-porting-layer.h"
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- adjust relevant parameters or
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- if different comphy index is used for specific feature, move it to proper table entry and then adjust.
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.. note::
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The final table size with comphy parameters can be different, depending
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on the CP module count for given SoC type.
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- Example:
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Example porting layer for armada-8040-db is under:
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``plat/marvell/armada/a8k/a80x0/board/phy-porting-layer.h``
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.. note::
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If there is no PHY porting layer for new platform (missing
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phy-porting-layer.h), the default values are used
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(drivers/marvell/comphy/phy-default-porting-layer.h) and the user is
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warned:
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.. warning::
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"Using default comphy parameters - it may be required to suit them for
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your board".
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