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447 lines
8.6 KiB
447 lines
8.6 KiB
/*
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* Copyright (c) 2019-2020, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <errno.h>
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#include <stddef.h>
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#include <platform_def.h>
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#include <common/debug.h>
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#include <drivers/delay_timer.h>
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#include <drivers/raw_nand.h>
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#include <lib/utils.h>
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#define ONFI_SIGNATURE_ADDR 0x20U
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/* CRC calculation */
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#define CRC_POLYNOM 0x8005U
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#define CRC_INIT_VALUE 0x4F4EU
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/* Status register */
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#define NAND_STATUS_READY BIT(6)
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#define SZ_128M 0x08000000U
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#define SZ_512 0x200U
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static struct rawnand_device rawnand_dev;
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#pragma weak plat_get_raw_nand_data
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int plat_get_raw_nand_data(struct rawnand_device *device)
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{
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return 0;
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}
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static int nand_send_cmd(uint8_t cmd, unsigned int tim)
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{
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struct nand_req req;
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zeromem(&req, sizeof(struct nand_req));
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req.nand = rawnand_dev.nand_dev;
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req.type = NAND_REQ_CMD | cmd;
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req.inst_delay = tim;
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return rawnand_dev.ops->exec(&req);
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}
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static int nand_send_addr(uint8_t addr, unsigned int tim)
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{
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struct nand_req req;
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zeromem(&req, sizeof(struct nand_req));
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req.nand = rawnand_dev.nand_dev;
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req.type = NAND_REQ_ADDR;
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req.addr = &addr;
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req.inst_delay = tim;
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return rawnand_dev.ops->exec(&req);
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}
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static int nand_send_wait(unsigned int delay, unsigned int tim)
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{
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struct nand_req req;
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zeromem(&req, sizeof(struct nand_req));
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req.nand = rawnand_dev.nand_dev;
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req.type = NAND_REQ_WAIT;
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req.inst_delay = tim;
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req.delay_ms = delay;
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return rawnand_dev.ops->exec(&req);
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}
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static int nand_read_data(uint8_t *data, unsigned int length, bool use_8bit)
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{
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struct nand_req req;
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zeromem(&req, sizeof(struct nand_req));
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req.nand = rawnand_dev.nand_dev;
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req.type = NAND_REQ_DATAIN | (use_8bit ? NAND_REQ_BUS_WIDTH_8 : 0U);
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req.addr = data;
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req.length = length;
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return rawnand_dev.ops->exec(&req);
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}
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int nand_change_read_column_cmd(unsigned int offset, uintptr_t buffer,
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unsigned int len)
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{
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int ret;
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uint8_t addr[2];
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unsigned int i;
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ret = nand_send_cmd(NAND_CMD_CHANGE_1ST, 0U);
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if (ret != 0) {
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return ret;
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}
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if (rawnand_dev.nand_dev->buswidth == NAND_BUS_WIDTH_16) {
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offset /= 2U;
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}
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addr[0] = offset;
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addr[1] = offset >> 8;
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for (i = 0; i < 2U; i++) {
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ret = nand_send_addr(addr[i], 0U);
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if (ret != 0) {
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return ret;
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}
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}
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ret = nand_send_cmd(NAND_CMD_CHANGE_2ND, NAND_TCCS_MIN);
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if (ret != 0) {
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return ret;
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}
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return nand_read_data((uint8_t *)buffer, len, false);
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}
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int nand_read_page_cmd(unsigned int page, unsigned int offset,
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uintptr_t buffer, unsigned int len)
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{
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uint8_t addr[5];
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uint8_t i = 0U;
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uint8_t j;
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int ret;
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VERBOSE(">%s page %u offset %u buffer 0x%lx\n", __func__, page, offset,
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buffer);
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if (rawnand_dev.nand_dev->buswidth == NAND_BUS_WIDTH_16) {
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offset /= 2U;
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}
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addr[i++] = offset;
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addr[i++] = offset >> 8;
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addr[i++] = page;
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addr[i++] = page >> 8;
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if (rawnand_dev.nand_dev->size > SZ_128M) {
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addr[i++] = page >> 16;
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}
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ret = nand_send_cmd(NAND_CMD_READ_1ST, 0U);
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if (ret != 0) {
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return ret;
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}
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for (j = 0U; j < i; j++) {
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ret = nand_send_addr(addr[j], 0U);
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if (ret != 0) {
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return ret;
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}
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}
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ret = nand_send_cmd(NAND_CMD_READ_2ND, NAND_TWB_MAX);
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if (ret != 0) {
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return ret;
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}
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ret = nand_send_wait(PSEC_TO_MSEC(NAND_TR_MAX), NAND_TRR_MIN);
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if (ret != 0) {
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return ret;
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}
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if (buffer != 0U) {
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ret = nand_read_data((uint8_t *)buffer, len, false);
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}
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return ret;
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}
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static int nand_status(uint8_t *status)
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{
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int ret;
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ret = nand_send_cmd(NAND_CMD_STATUS, NAND_TWHR_MIN);
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if (ret != 0) {
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return ret;
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}
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if (status != NULL) {
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ret = nand_read_data(status, 1U, true);
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}
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return ret;
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}
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int nand_wait_ready(unsigned int delay_ms)
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{
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uint8_t status;
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int ret;
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uint64_t timeout;
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/* Wait before reading status */
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udelay(1);
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ret = nand_status(NULL);
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if (ret != 0) {
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return ret;
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}
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timeout = timeout_init_us(delay_ms * 1000U);
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while (!timeout_elapsed(timeout)) {
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ret = nand_read_data(&status, 1U, true);
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if (ret != 0) {
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return ret;
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}
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if ((status & NAND_STATUS_READY) != 0U) {
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return nand_send_cmd(NAND_CMD_READ_1ST, 0U);
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}
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udelay(10);
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}
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return -ETIMEDOUT;
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}
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#if NAND_ONFI_DETECT
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static uint16_t nand_check_crc(uint16_t crc, uint8_t *data_in,
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unsigned int data_len)
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{
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uint32_t i;
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uint32_t j;
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uint32_t bit;
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for (i = 0U; i < data_len; i++) {
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uint8_t cur_param = *data_in++;
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for (j = BIT(7); j != 0U; j >>= 1) {
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bit = crc & BIT(15);
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crc <<= 1;
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if ((cur_param & j) != 0U) {
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bit ^= BIT(15);
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}
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if (bit != 0U) {
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crc ^= CRC_POLYNOM;
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}
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}
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crc &= GENMASK(15, 0);
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}
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return crc;
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}
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static int nand_read_id(uint8_t addr, uint8_t *id, unsigned int size)
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{
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int ret;
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ret = nand_send_cmd(NAND_CMD_READID, 0U);
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if (ret != 0) {
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return ret;
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}
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ret = nand_send_addr(addr, NAND_TWHR_MIN);
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if (ret != 0) {
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return ret;
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}
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return nand_read_data(id, size, true);
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}
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static int nand_reset(void)
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{
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int ret;
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ret = nand_send_cmd(NAND_CMD_RESET, NAND_TWB_MAX);
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if (ret != 0) {
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return ret;
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}
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return nand_send_wait(PSEC_TO_MSEC(NAND_TRST_MAX), 0U);
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}
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static int nand_read_param_page(void)
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{
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struct nand_param_page page;
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uint8_t addr = 0U;
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int ret;
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ret = nand_send_cmd(NAND_CMD_READ_PARAM_PAGE, 0U);
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if (ret != 0) {
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return ret;
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}
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ret = nand_send_addr(addr, NAND_TWB_MAX);
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if (ret != 0) {
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return ret;
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}
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ret = nand_send_wait(PSEC_TO_MSEC(NAND_TR_MAX), NAND_TRR_MIN);
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if (ret != 0) {
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return ret;
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}
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ret = nand_read_data((uint8_t *)&page, sizeof(page), true);
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if (ret != 0) {
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return ret;
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}
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if (strncmp((char *)&page.page_sig, "ONFI", 4) != 0) {
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WARN("Error ONFI detection\n");
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return -EINVAL;
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}
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if (nand_check_crc(CRC_INIT_VALUE, (uint8_t *)&page, 254U) !=
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page.crc16) {
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WARN("Error reading param\n");
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return -EINVAL;
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}
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if ((page.features & ONFI_FEAT_BUS_WIDTH_16) != 0U) {
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rawnand_dev.nand_dev->buswidth = NAND_BUS_WIDTH_16;
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} else {
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rawnand_dev.nand_dev->buswidth = NAND_BUS_WIDTH_8;
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}
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rawnand_dev.nand_dev->block_size = page.num_pages_per_blk *
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page.bytes_per_page;
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rawnand_dev.nand_dev->page_size = page.bytes_per_page;
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rawnand_dev.nand_dev->size = page.num_pages_per_blk *
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page.bytes_per_page *
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page.num_blk_in_lun * page.num_lun;
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if (page.nb_ecc_bits != GENMASK_32(7, 0)) {
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rawnand_dev.nand_dev->ecc.max_bit_corr = page.nb_ecc_bits;
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rawnand_dev.nand_dev->ecc.size = SZ_512;
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}
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VERBOSE("Page size %u, block_size %u, Size %llu, ecc %u, buswidth %u\n",
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rawnand_dev.nand_dev->page_size,
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rawnand_dev.nand_dev->block_size, rawnand_dev.nand_dev->size,
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rawnand_dev.nand_dev->ecc.max_bit_corr,
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rawnand_dev.nand_dev->buswidth);
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return 0;
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}
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static int detect_onfi(void)
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{
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int ret;
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char id[4];
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ret = nand_reset();
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if (ret != 0) {
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return ret;
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}
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ret = nand_read_id(ONFI_SIGNATURE_ADDR, (uint8_t *)id, sizeof(id));
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if (ret != 0) {
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return ret;
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}
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if (strncmp(id, "ONFI", sizeof(id)) != 0) {
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WARN("NAND Non ONFI detected\n");
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return -ENODEV;
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}
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return nand_read_param_page();
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}
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#endif
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static int nand_mtd_block_is_bad(unsigned int block)
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{
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unsigned int nbpages_per_block = rawnand_dev.nand_dev->block_size /
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rawnand_dev.nand_dev->page_size;
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uint8_t bbm_marker[2];
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uint8_t page;
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int ret;
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for (page = 0U; page < 2U; page++) {
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ret = nand_read_page_cmd(block * nbpages_per_block,
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rawnand_dev.nand_dev->page_size,
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(uintptr_t)bbm_marker,
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sizeof(bbm_marker));
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if (ret != 0) {
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return ret;
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}
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if ((bbm_marker[0] != GENMASK_32(7, 0)) ||
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(bbm_marker[1] != GENMASK_32(7, 0))) {
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WARN("Block %u is bad\n", block);
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return 1;
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}
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}
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return 0;
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}
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static int nand_mtd_read_page_raw(struct nand_device *nand, unsigned int page,
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uintptr_t buffer)
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{
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return nand_read_page_cmd(page, 0U, buffer,
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rawnand_dev.nand_dev->page_size);
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}
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void nand_raw_ctrl_init(const struct nand_ctrl_ops *ops)
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{
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rawnand_dev.ops = ops;
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}
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int nand_raw_init(unsigned long long *size, unsigned int *erase_size)
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{
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rawnand_dev.nand_dev = get_nand_device();
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if (rawnand_dev.nand_dev == NULL) {
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return -EINVAL;
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}
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rawnand_dev.nand_dev->mtd_block_is_bad = nand_mtd_block_is_bad;
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rawnand_dev.nand_dev->mtd_read_page = nand_mtd_read_page_raw;
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rawnand_dev.nand_dev->ecc.mode = NAND_ECC_NONE;
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if ((rawnand_dev.ops->setup == NULL) ||
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(rawnand_dev.ops->exec == NULL)) {
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return -ENODEV;
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}
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#if NAND_ONFI_DETECT
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if (detect_onfi() != 0) {
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WARN("Detect ONFI failed\n");
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}
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#endif
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if (plat_get_raw_nand_data(&rawnand_dev) != 0) {
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return -EINVAL;
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}
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assert((rawnand_dev.nand_dev->page_size != 0U) &&
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(rawnand_dev.nand_dev->block_size != 0U) &&
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(rawnand_dev.nand_dev->size != 0U));
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*size = rawnand_dev.nand_dev->size;
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*erase_size = rawnand_dev.nand_dev->block_size;
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rawnand_dev.ops->setup(rawnand_dev.nand_dev);
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return 0;
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}
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