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145 lines
3.0 KiB
145 lines
3.0 KiB
/*
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* Copyright (c) 2019-2020, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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/ {
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model = "V2P-CA5s";
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compatible = "arm,vexpress,v2p-ca5s", "arm,vexpress";
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interrupt-parent = <&gic>;
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a5";
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reg = <0>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x1000000>;
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};
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hdlcd@2a110000 {
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compatible = "arm,hdlcd";
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reg = <0x2a110000 0x1000>;
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interrupts = <0 85 4>;
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clocks = <&oscclk3>;
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clock-names = "pxlclk";
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};
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scu@2c000000 {
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compatible = "arm,cortex-a5-scu";
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reg = <0x2c000000 0x58>;
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};
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watchdog@2c000620 {
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compatible = "arm,cortex-a5-twd-wdt";
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reg = <0x2c000620 0x20>;
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interrupts = <1 14 0x304>;
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};
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gic: interrupt-controller@2c001000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x2c001000 0x1000>,
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<0x2c000100 0x100>;
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};
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dcc {
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compatible = "arm,vexpress,config-bus";
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arm,vexpress,config-bridge = <&v2m_sysreg>;
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oscclk0: osc@0 {
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/* CPU and internal AXI reference clock */
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 0>;
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freq-range = <50000000 100000000>;
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#clock-cells = <0>;
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clock-output-names = "oscclk0";
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};
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oscclk1: osc@1 {
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/* Multiplexed AXI master clock */
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 1>;
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freq-range = <5000000 50000000>;
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#clock-cells = <0>;
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clock-output-names = "oscclk1";
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};
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osc@2 {
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/* DDR2 */
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 2>;
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freq-range = <80000000 120000000>;
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#clock-cells = <0>;
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clock-output-names = "oscclk2";
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};
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oscclk3: osc@3 {
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/* HDLCD */
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 3>;
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freq-range = <23750000 165000000>;
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#clock-cells = <0>;
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clock-output-names = "oscclk3";
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};
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osc@4 {
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/* Test chip gate configuration */
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 4>;
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freq-range = <80000000 80000000>;
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#clock-cells = <0>;
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clock-output-names = "oscclk4";
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};
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smbclk: osc@5 {
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/* SMB clock */
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compatible = "arm,vexpress-osc";
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arm,vexpress-sysreg,func = <1 5>;
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freq-range = <25000000 60000000>;
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#clock-cells = <0>;
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clock-output-names = "oscclk5";
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};
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};
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smb {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x08000000 0x04000000>,
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<1 0 0x14000000 0x04000000>,
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<2 0 0x18000000 0x04000000>,
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<3 0 0x1c000000 0x04000000>,
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<4 0 0x0c000000 0x04000000>,
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<5 0 0x10000000 0x04000000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 63>;
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interrupt-map = <0 0 0 &gic 0 0 4>,
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<0 0 1 &gic 0 1 4>,
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<0 0 2 &gic 0 2 4>,
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<0 0 3 &gic 0 3 4>,
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<0 0 4 &gic 0 4 4>,
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<0 0 5 &gic 0 5 4>,
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<0 0 42 &gic 0 42 4>;
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#include "rtsm_ve-motherboard-aarch32.dtsi"
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};
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};
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