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207 lines
5.3 KiB
207 lines
5.3 KiB
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <string.h>
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#include <platform_def.h>
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#include <arch_helpers.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <drivers/console.h>
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#include <lib/mmio.h>
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#include <plat/common/platform.h>
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#include <hi6220.h>
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#define MCU_SECTION_MAX 30
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enum MCU_IMAGE_SEC_TYPE_ENUM {
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MCU_IMAGE_SEC_TYPE_TEXT = 0, /* text section */
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MCU_IMAGE_SEC_TYPE_DATA, /* data section */
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MCU_IMAGE_SEC_TYPE_BUTT
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};
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enum MCU_IMAGE_SEC_LOAD_ENUM {
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MCU_IMAGE_SEC_LOAD_STATIC = 0,
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MCU_IMAGE_SEC_LOAD_DYNAMIC,
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MCU_IMAGE_SEC_LOAD_BUFFER,
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MCU_IMAGE_SEC_LOAD_MODEM_ENTRY,
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MCU_IMAGE_SEC_LOAD_BUTT
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};
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struct mcu_image_sec {
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unsigned short serial;
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char type;
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char load_attr;
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uint32_t src_offset; /* offset in image */
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uint32_t dst_offset; /* offset in memory */
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uint32_t size;
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};
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struct mcu_image_head {
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char time_stamp[24];
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uint32_t image_size;
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uint32_t secs_num;
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struct mcu_image_sec secs[MCU_SECTION_MAX];
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};
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#define SOC_SRAM_M3_BASE_ADDR (0xF6000000)
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#define MCU_SRAM_SIZE (0x0000C000)
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#define MCU_CACHE_SIZE (0x00004000)
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#define MCU_CODE_SIZE (MCU_SRAM_SIZE - MCU_CACHE_SIZE)
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#define MCU_SYS_MEM_ADDR (0x05E00000)
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#define MCU_SYS_MEM_SIZE (0x00100000)
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static uint32_t mcu2ap_addr(uint32_t mcu_addr)
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{
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if (mcu_addr < MCU_CODE_SIZE)
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return (mcu_addr + SOC_SRAM_M3_BASE_ADDR);
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else if ((mcu_addr >= MCU_SRAM_SIZE) &&
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(mcu_addr < MCU_SRAM_SIZE + MCU_SYS_MEM_SIZE))
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return mcu_addr - MCU_SRAM_SIZE + MCU_SYS_MEM_ADDR;
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else
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return mcu_addr;
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}
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static int is_binary_header_invalid(struct mcu_image_head *head,
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unsigned int length)
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{
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/* invalid cases */
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if ((head->image_size == 0) ||
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(head->image_size > length) ||
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(head->secs_num > MCU_SECTION_MAX) ||
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(head->secs_num == 0))
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return 1;
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return 0;
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}
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static int is_binary_section_invalid(struct mcu_image_sec *sec,
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struct mcu_image_head *head)
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{
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unsigned long ap_dst_offset = 0;
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if ((sec->serial >= head->secs_num) ||
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(sec->src_offset + sec->size > head->image_size))
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return 1;
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if ((sec->type >= MCU_IMAGE_SEC_TYPE_BUTT) ||
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(sec->load_attr >= MCU_IMAGE_SEC_LOAD_BUTT))
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return 1;
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ap_dst_offset = mcu2ap_addr(sec->dst_offset);
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if ((ap_dst_offset >= SOC_SRAM_M3_BASE_ADDR) &&
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(ap_dst_offset < SOC_SRAM_M3_BASE_ADDR + 0x20000 - sec->size))
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return 0;
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else if ((ap_dst_offset >= MCU_SYS_MEM_ADDR) &&
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(ap_dst_offset < MCU_SYS_MEM_ADDR + MCU_SYS_MEM_SIZE - sec->size))
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return 0;
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else if ((ap_dst_offset >= 0xfff8e000) &&
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(ap_dst_offset < 0xfff91c00 - sec->size))
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return 0;
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ERROR("%s: mcu destination address invalid.\n", __func__);
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ERROR("%s: number=%d, dst offset=%d size=%d\n",
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__func__, sec->serial, sec->dst_offset, sec->size);
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return 1;
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}
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void hisi_mcu_enable_sram(void)
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{
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mmio_write_32(AO_SC_PERIPH_CLKEN4,
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AO_SC_PERIPH_CLKEN4_HCLK_IPC_S |
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AO_SC_PERIPH_CLKEN4_HCLK_IPC_NS);
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/* set register to enable dvfs which is used by mcu */
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mmio_write_32(PERI_SC_RESERVED8_ADDR, 0x0A001022);
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/* mcu mem is powered on, need de-assert reset */
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mmio_write_32(AO_SC_PERIPH_RSTDIS4,
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AO_SC_PERIPH_RSTDIS4_RESET_MCU_ECTR_N);
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/* enable mcu hclk */
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mmio_write_32(AO_SC_PERIPH_CLKEN4,
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AO_SC_PERIPH_CLKEN4_HCLK_MCU |
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AO_SC_PERIPH_CLKEN4_CLK_MCU_DAP);
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}
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void hisi_mcu_start_run(void)
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{
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unsigned int val;
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/* set mcu ddr remap configuration */
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mmio_write_32(AO_SC_MCU_SUBSYS_CTRL2, MCU_SYS_MEM_ADDR);
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/* de-assert reset for mcu and to run */
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mmio_write_32(AO_SC_PERIPH_RSTDIS4,
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AO_SC_PERIPH_RSTDIS4_RESET_MCU_ECTR_N |
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AO_SC_PERIPH_RSTDIS4_RESET_MCU_SYS_N |
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AO_SC_PERIPH_RSTDIS4_RESET_MCU_POR_N |
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AO_SC_PERIPH_RSTDIS4_RESET_MCU_DAP_N);
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val = mmio_read_32(AO_SC_SYS_CTRL2);
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mmio_write_32(AO_SC_SYS_CTRL2,
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val | AO_SC_SYS_CTRL2_GLB_SRST_STAT_CLEAR);
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INFO("%s: AO_SC_SYS_CTRL2=%x\n", __func__,
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mmio_read_32(AO_SC_SYS_CTRL2));
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}
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int hisi_mcu_load_image(uintptr_t image_base, uint32_t image_size)
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{
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unsigned int i;
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struct mcu_image_head *head;
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char *buf;
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head = (struct mcu_image_head *)image_base;
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if (is_binary_header_invalid(head, image_size)) {
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ERROR("Invalid %s image header.\n", head->time_stamp);
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return -1;
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}
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buf = (char *)head;
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for (i = 0; i < head->secs_num; i++) {
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int *src, *dst;
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/* check the sections */
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if (is_binary_section_invalid(&head->secs[i], head)) {
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ERROR("Invalid mcu section.\n");
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return -1;
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}
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/* check if the section is static-loaded */
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if (head->secs[i].load_attr != MCU_IMAGE_SEC_LOAD_STATIC)
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continue;
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/* copy the sections */
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src = (int *)(intptr_t)(buf + head->secs[i].src_offset);
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dst = (int *)(intptr_t)mcu2ap_addr(head->secs[i].dst_offset);
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memcpy((void *)dst, (void *)src, head->secs[i].size);
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INFO("%s: mcu sections %d:\n", __func__, i);
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INFO("%s: src = 0x%x\n",
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__func__, (unsigned int)(uintptr_t)src);
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INFO("%s: dst = 0x%x\n",
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__func__, (unsigned int)(uintptr_t)dst);
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INFO("%s: size = %d\n", __func__, head->secs[i].size);
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INFO("%s: [SRC 0x%x] 0x%x 0x%x 0x%x 0x%x\n",
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__func__, (unsigned int)(uintptr_t)src,
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src[0], src[1], src[2], src[3]);
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INFO("%s: [DST 0x%x] 0x%x 0x%x 0x%x 0x%x\n",
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__func__, (unsigned int)(uintptr_t)dst,
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dst[0], dst[1], dst[2], dst[3]);
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}
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return 0;
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}
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