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101 lines
3.1 KiB
101 lines
3.1 KiB
/*
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* Copyright (c) 2020, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef UART_H
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#define UART_H
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#include <platform_def.h>
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/* UART HW information */
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#define HW_SUPPORT_UART_PORTS 2
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#define DRV_SUPPORT_UART_PORTS 2
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/* console UART clock cg */
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#define UART_CLOCK_GATE_SET (INFRACFG_AO_BASE + 0x80)
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#define UART_CLOCK_GATE_CLR (INFRACFG_AO_BASE + 0x84)
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#define UART_CLOCK_GATE_STA (INFRACFG_AO_BASE + 0x90)
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#define UART0_CLOCK_GATE_BIT (1U<<22)
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#define UART1_CLOCK_GATE_BIT (1U<<23)
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/* UART registers */
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#define UART_RBR(_baseaddr) (_baseaddr + 0x0)
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#define UART_THR(_baseaddr) (_baseaddr + 0x0)
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#define UART_IER(_baseaddr) (_baseaddr + 0x4)
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#define UART_IIR(_baseaddr) (_baseaddr + 0x8)
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#define UART_FCR(_baseaddr) (_baseaddr + 0x8)
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#define UART_LCR(_baseaddr) (_baseaddr + 0xc)
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#define UART_MCR(_baseaddr) (_baseaddr + 0x10)
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#define UART_LSR(_baseaddr) (_baseaddr + 0x14)
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#define UART_MSR(_baseaddr) (_baseaddr + 0x18)
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#define UART_SCR(_baseaddr) (_baseaddr + 0x1c)
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#define UART_DLL(_baseaddr) (_baseaddr + 0x0)
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#define UART_DLH(_baseaddr) (_baseaddr + 0x4)
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#define UART_EFR(_baseaddr) (_baseaddr + 0x8)
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#define UART_XON1(_baseaddr) (_baseaddr + 0x10)
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#define UART_XON2(_baseaddr) (_baseaddr + 0x14)
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#define UART_XOFF1(_baseaddr) (_baseaddr + 0x18)
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#define UART_XOFF2(_baseaddr) (_baseaddr + 0x1c)
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#define UART_AUTOBAUD(_baseaddr) (_baseaddr + 0x20)
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#define UART_HIGHSPEED(_baseaddr) (_baseaddr + 0x24)
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#define UART_SAMPLE_COUNT(_baseaddr) (_baseaddr + 0x28)
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#define UART_SAMPLE_POINT(_baseaddr) (_baseaddr + 0x2c)
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#define UART_AUTOBAUD_REG(_baseaddr) (_baseaddr + 0x30)
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#define UART_RATE_FIX_REG(_baseaddr) (_baseaddr + 0x34)
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#define UART_AUTO_BAUDSAMPLE(_baseaddr) (_baseaddr + 0x38)
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#define UART_GUARD(_baseaddr) (_baseaddr + 0x3c)
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#define UART_ESCAPE_DAT(_baseaddr) (_baseaddr + 0x40)
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#define UART_ESCAPE_EN(_baseaddr) (_baseaddr + 0x44)
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#define UART_SLEEP_EN(_baseaddr) (_baseaddr + 0x48)
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#define UART_DMA_EN(_baseaddr) (_baseaddr + 0x4c)
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#define UART_RXTRI_AD(_baseaddr) (_baseaddr + 0x50)
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#define UART_FRACDIV_L(_baseaddr) (_baseaddr + 0x54)
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#define UART_FRACDIV_M(_baseaddr) (_baseaddr + 0x58)
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#define UART_FCR_RD(_baseaddr) (_baseaddr + 0x5C)
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#define UART_USB_RX_SEL(_baseaddr) (_baseaddr + 0xB0)
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#define UART_SLEEP_REQ(_baseaddr) (_baseaddr + 0xB4)
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#define UART_SLEEP_ACK(_baseaddr) (_baseaddr + 0xB8)
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#define UART_SPM_SEL(_baseaddr) (_baseaddr + 0xBC)
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#define UART_LCR_DLAB 0x0080
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#define UART_LCR_MODE_B 0x00bf
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enum uart_port_ID {
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UART_PORT0 = 0,
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UART_PORT1
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};
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struct mt_uart_register {
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uint32_t dll;
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uint32_t dlh;
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uint32_t ier;
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uint32_t lcr;
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uint32_t mcr;
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uint32_t fcr;
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uint32_t lsr;
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uint32_t scr;
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uint32_t efr;
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uint32_t highspeed;
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uint32_t sample_count;
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uint32_t sample_point;
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uint32_t fracdiv_l;
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uint32_t fracdiv_m;
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uint32_t escape_en;
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uint32_t guard;
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uint32_t rx_sel;
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};
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struct mt_uart {
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unsigned long base;
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struct mt_uart_register registers;
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};
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/* external API */
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void mt_uart_save(void);
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void mt_uart_restore(void);
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void mt_console_uart_cg(int on);
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uint32_t mt_console_uart_cg_status(void);
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#endif /* __UART_H__ */
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