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647 lines
19 KiB
647 lines
19 KiB
/*
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* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <errno.h>
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#include <string.h>
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#include <arch_helpers.h>
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#include <arch/aarch64/arch_features.h>
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#include <bl31/bl31.h>
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#include <common/debug.h>
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#include <common/runtime_svc.h>
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#include <lib/el3_runtime/context_mgmt.h>
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#include <lib/smccc.h>
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#include <lib/spinlock.h>
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#include <lib/utils.h>
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#include <plat/common/common_def.h>
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#include <plat/common/platform.h>
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#include <platform_def.h>
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#include <services/ffa_svc.h>
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#include <services/spmd_svc.h>
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#include <smccc_helpers.h>
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#include "spmd_private.h"
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/*******************************************************************************
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* SPM Core context information.
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******************************************************************************/
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static spmd_spm_core_context_t spm_core_context[PLATFORM_CORE_COUNT];
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/*******************************************************************************
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* SPM Core attribute information read from its manifest.
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******************************************************************************/
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static spmc_manifest_attribute_t spmc_attrs;
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/*******************************************************************************
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* SPM Core entry point information. Discovered on the primary core and reused
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* on secondary cores.
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******************************************************************************/
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static entry_point_info_t *spmc_ep_info;
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/*******************************************************************************
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* SPM Core context on CPU based on mpidr.
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******************************************************************************/
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spmd_spm_core_context_t *spmd_get_context_by_mpidr(uint64_t mpidr)
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{
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int core_idx = plat_core_pos_by_mpidr(mpidr);
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if (core_idx < 0) {
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ERROR("Invalid mpidr: %llx, returned ID: %d\n", mpidr, core_idx);
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panic();
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}
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return &spm_core_context[core_idx];
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}
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/*******************************************************************************
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* SPM Core context on current CPU get helper.
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******************************************************************************/
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spmd_spm_core_context_t *spmd_get_context(void)
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{
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return spmd_get_context_by_mpidr(read_mpidr());
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}
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/*******************************************************************************
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* SPM Core entry point information get helper.
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******************************************************************************/
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entry_point_info_t *spmd_spmc_ep_info_get(void)
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{
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return spmc_ep_info;
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}
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/*******************************************************************************
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* SPM Core ID getter.
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******************************************************************************/
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uint16_t spmd_spmc_id_get(void)
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{
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return spmc_attrs.spmc_id;
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}
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/*******************************************************************************
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* Static function declaration.
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******************************************************************************/
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static int32_t spmd_init(void);
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static int spmd_spmc_init(void *pm_addr);
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static uint64_t spmd_ffa_error_return(void *handle,
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int error_code);
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static uint64_t spmd_smc_forward(uint32_t smc_fid,
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bool secure_origin,
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uint64_t x1,
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uint64_t x2,
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uint64_t x3,
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uint64_t x4,
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void *handle);
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/*******************************************************************************
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* This function takes an SPMC context pointer and performs a synchronous
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* SPMC entry.
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******************************************************************************/
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uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *spmc_ctx)
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{
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uint64_t rc;
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assert(spmc_ctx != NULL);
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cm_set_context(&(spmc_ctx->cpu_ctx), SECURE);
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/* Restore the context assigned above */
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cm_el1_sysregs_context_restore(SECURE);
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#if SPMD_SPM_AT_SEL2
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cm_el2_sysregs_context_restore(SECURE);
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#endif
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cm_set_next_eret_context(SECURE);
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/* Enter SPMC */
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rc = spmd_spm_core_enter(&spmc_ctx->c_rt_ctx);
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/* Save secure state */
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cm_el1_sysregs_context_save(SECURE);
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#if SPMD_SPM_AT_SEL2
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cm_el2_sysregs_context_save(SECURE);
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#endif
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return rc;
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}
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/*******************************************************************************
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* This function returns to the place where spmd_spm_core_sync_entry() was
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* called originally.
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******************************************************************************/
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__dead2 void spmd_spm_core_sync_exit(uint64_t rc)
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{
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spmd_spm_core_context_t *ctx = spmd_get_context();
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/* Get current CPU context from SPMC context */
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assert(cm_get_context(SECURE) == &(ctx->cpu_ctx));
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/*
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* The SPMD must have initiated the original request through a
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* synchronous entry into SPMC. Jump back to the original C runtime
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* context with the value of rc in x0;
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*/
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spmd_spm_core_exit(ctx->c_rt_ctx, rc);
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panic();
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}
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/*******************************************************************************
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* Jump to the SPM Core for the first time.
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******************************************************************************/
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static int32_t spmd_init(void)
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{
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spmd_spm_core_context_t *ctx = spmd_get_context();
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uint64_t rc;
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unsigned int linear_id = plat_my_core_pos();
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unsigned int core_id;
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VERBOSE("SPM Core init start.\n");
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ctx->state = SPMC_STATE_ON_PENDING;
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/* Set the SPMC context state on other CPUs to OFF */
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for (core_id = 0U; core_id < PLATFORM_CORE_COUNT; core_id++) {
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if (core_id != linear_id) {
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spm_core_context[core_id].state = SPMC_STATE_OFF;
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spm_core_context[core_id].secondary_ep.entry_point = 0UL;
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}
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}
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rc = spmd_spm_core_sync_entry(ctx);
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if (rc != 0ULL) {
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ERROR("SPMC initialisation failed 0x%llx\n", rc);
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return 0;
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}
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ctx->state = SPMC_STATE_ON;
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VERBOSE("SPM Core init end.\n");
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return 1;
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}
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/*******************************************************************************
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* Loads SPMC manifest and inits SPMC.
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******************************************************************************/
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static int spmd_spmc_init(void *pm_addr)
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{
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spmd_spm_core_context_t *spm_ctx = spmd_get_context();
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uint32_t ep_attr;
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int rc;
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/* Load the SPM Core manifest */
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rc = plat_spm_core_manifest_load(&spmc_attrs, pm_addr);
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if (rc != 0) {
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WARN("No or invalid SPM Core manifest image provided by BL2\n");
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return rc;
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}
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/*
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* Ensure that the SPM Core version is compatible with the SPM
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* Dispatcher version.
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*/
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if ((spmc_attrs.major_version != FFA_VERSION_MAJOR) ||
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(spmc_attrs.minor_version > FFA_VERSION_MINOR)) {
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WARN("Unsupported FFA version (%u.%u)\n",
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spmc_attrs.major_version, spmc_attrs.minor_version);
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return -EINVAL;
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}
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VERBOSE("FFA version (%u.%u)\n", spmc_attrs.major_version,
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spmc_attrs.minor_version);
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VERBOSE("SPM Core run time EL%x.\n",
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SPMD_SPM_AT_SEL2 ? MODE_EL2 : MODE_EL1);
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/* Validate the SPMC ID, Ensure high bit is set */
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if (((spmc_attrs.spmc_id >> SPMC_SECURE_ID_SHIFT) &
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SPMC_SECURE_ID_MASK) == 0U) {
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WARN("Invalid ID (0x%x) for SPMC.\n", spmc_attrs.spmc_id);
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return -EINVAL;
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}
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/* Validate the SPM Core execution state */
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if ((spmc_attrs.exec_state != MODE_RW_64) &&
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(spmc_attrs.exec_state != MODE_RW_32)) {
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WARN("Unsupported %s%x.\n", "SPM Core execution state 0x",
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spmc_attrs.exec_state);
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return -EINVAL;
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}
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VERBOSE("%s%x.\n", "SPM Core execution state 0x",
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spmc_attrs.exec_state);
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#if SPMD_SPM_AT_SEL2
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/* Ensure manifest has not requested AArch32 state in S-EL2 */
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if (spmc_attrs.exec_state == MODE_RW_32) {
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WARN("AArch32 state at S-EL2 is not supported.\n");
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return -EINVAL;
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}
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/*
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* Check if S-EL2 is supported on this system if S-EL2
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* is required for SPM
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*/
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if (!is_armv8_4_sel2_present()) {
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WARN("SPM Core run time S-EL2 is not supported.\n");
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return -EINVAL;
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}
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#endif /* SPMD_SPM_AT_SEL2 */
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/* Initialise an entrypoint to set up the CPU context */
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ep_attr = SECURE | EP_ST_ENABLE;
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if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0ULL) {
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ep_attr |= EP_EE_BIG;
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}
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SET_PARAM_HEAD(spmc_ep_info, PARAM_EP, VERSION_1, ep_attr);
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/*
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* Populate SPSR for SPM Core based upon validated parameters from the
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* manifest.
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*/
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if (spmc_attrs.exec_state == MODE_RW_32) {
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spmc_ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
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SPSR_E_LITTLE,
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DAIF_FIQ_BIT |
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DAIF_IRQ_BIT |
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DAIF_ABT_BIT);
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} else {
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#if SPMD_SPM_AT_SEL2
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static const uint32_t runtime_el = MODE_EL2;
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#else
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static const uint32_t runtime_el = MODE_EL1;
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#endif
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spmc_ep_info->spsr = SPSR_64(runtime_el,
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MODE_SP_ELX,
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DISABLE_ALL_EXCEPTIONS);
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}
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/* Initialise SPM Core context with this entry point information */
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cm_setup_context(&spm_ctx->cpu_ctx, spmc_ep_info);
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/* Reuse PSCI affinity states to mark this SPMC context as off */
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spm_ctx->state = AFF_STATE_OFF;
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INFO("SPM Core setup done.\n");
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/* Register power management hooks with PSCI */
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psci_register_spd_pm_hook(&spmd_pm);
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/* Register init function for deferred init. */
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bl31_register_bl32_init(&spmd_init);
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return 0;
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}
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/*******************************************************************************
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* Initialize context of SPM Core.
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******************************************************************************/
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int spmd_setup(void)
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{
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void *spmc_manifest;
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int rc;
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spmc_ep_info = bl31_plat_get_next_image_ep_info(SECURE);
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if (spmc_ep_info == NULL) {
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WARN("No SPM Core image provided by BL2 boot loader.\n");
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return -EINVAL;
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}
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/* Under no circumstances will this parameter be 0 */
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assert(spmc_ep_info->pc != 0ULL);
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/*
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* Check if BL32 ep_info has a reference to 'tos_fw_config'. This will
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* be used as a manifest for the SPM Core at the next lower EL/mode.
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*/
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spmc_manifest = (void *)spmc_ep_info->args.arg0;
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if (spmc_manifest == NULL) {
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ERROR("Invalid or absent SPM Core manifest.\n");
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return -EINVAL;
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}
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/* Load manifest, init SPMC */
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rc = spmd_spmc_init(spmc_manifest);
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if (rc != 0) {
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WARN("Booting device without SPM initialization.\n");
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}
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return rc;
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}
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/*******************************************************************************
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* Forward SMC to the other security state
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******************************************************************************/
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static uint64_t spmd_smc_forward(uint32_t smc_fid,
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bool secure_origin,
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uint64_t x1,
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uint64_t x2,
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uint64_t x3,
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uint64_t x4,
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void *handle)
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{
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unsigned int secure_state_in = (secure_origin) ? SECURE : NON_SECURE;
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unsigned int secure_state_out = (!secure_origin) ? SECURE : NON_SECURE;
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/* Save incoming security state */
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cm_el1_sysregs_context_save(secure_state_in);
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#if CTX_INCLUDE_FPREGS
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fpregs_context_save(get_fpregs_ctx(cm_get_context(secure_state_in)));
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#endif
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#if SPMD_SPM_AT_SEL2
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cm_el2_sysregs_context_save(secure_state_in);
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#endif
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/* Restore outgoing security state */
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cm_el1_sysregs_context_restore(secure_state_out);
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#if CTX_INCLUDE_FPREGS
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fpregs_context_restore(get_fpregs_ctx(cm_get_context(secure_state_out)));
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#endif
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#if SPMD_SPM_AT_SEL2
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cm_el2_sysregs_context_restore(secure_state_out);
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#endif
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cm_set_next_eret_context(secure_state_out);
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SMC_RET8(cm_get_context(secure_state_out), smc_fid, x1, x2, x3, x4,
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SMC_GET_GP(handle, CTX_GPREG_X5),
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SMC_GET_GP(handle, CTX_GPREG_X6),
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SMC_GET_GP(handle, CTX_GPREG_X7));
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}
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/*******************************************************************************
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* Return FFA_ERROR with specified error code
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******************************************************************************/
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static uint64_t spmd_ffa_error_return(void *handle, int error_code)
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{
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SMC_RET8(handle, FFA_ERROR,
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FFA_TARGET_INFO_MBZ, error_code,
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FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ,
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FFA_PARAM_MBZ, FFA_PARAM_MBZ);
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}
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/*******************************************************************************
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* spmd_check_address_in_binary_image
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******************************************************************************/
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bool spmd_check_address_in_binary_image(uint64_t address)
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{
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assert(!check_uptr_overflow(spmc_attrs.load_address, spmc_attrs.binary_size));
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return ((address >= spmc_attrs.load_address) &&
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(address < (spmc_attrs.load_address + spmc_attrs.binary_size)));
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}
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/******************************************************************************
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* spmd_is_spmc_message
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*****************************************************************************/
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static bool spmd_is_spmc_message(unsigned int ep)
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{
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return ((ffa_endpoint_destination(ep) == SPMD_DIRECT_MSG_ENDPOINT_ID)
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&& (ffa_endpoint_source(ep) == spmc_attrs.spmc_id));
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}
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/******************************************************************************
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* spmd_handle_spmc_message
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*****************************************************************************/
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static int spmd_handle_spmc_message(unsigned long long msg,
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unsigned long long parm1, unsigned long long parm2,
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unsigned long long parm3, unsigned long long parm4)
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{
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VERBOSE("%s %llx %llx %llx %llx %llx\n", __func__,
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msg, parm1, parm2, parm3, parm4);
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switch (msg) {
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case SPMD_DIRECT_MSG_SET_ENTRY_POINT:
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return spmd_pm_secondary_core_set_ep(parm1, parm2, parm3);
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default:
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break;
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}
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return -EINVAL;
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}
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/*******************************************************************************
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* This function handles all SMCs in the range reserved for FFA. Each call is
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* either forwarded to the other security state or handled by the SPM dispatcher
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******************************************************************************/
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uint64_t spmd_smc_handler(uint32_t smc_fid,
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uint64_t x1,
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uint64_t x2,
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uint64_t x3,
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uint64_t x4,
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void *cookie,
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void *handle,
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uint64_t flags)
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{
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spmd_spm_core_context_t *ctx = spmd_get_context();
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bool secure_origin;
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int32_t ret;
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uint32_t input_version;
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/* Determine which security state this SMC originated from */
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secure_origin = is_caller_secure(flags);
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INFO("SPM: 0x%x 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx 0x%llx\n",
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smc_fid, x1, x2, x3, x4, SMC_GET_GP(handle, CTX_GPREG_X5),
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SMC_GET_GP(handle, CTX_GPREG_X6),
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SMC_GET_GP(handle, CTX_GPREG_X7));
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switch (smc_fid) {
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case FFA_ERROR:
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/*
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* Check if this is the first invocation of this interface on
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* this CPU. If so, then indicate that the SPM Core initialised
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* unsuccessfully.
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*/
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if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) {
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spmd_spm_core_sync_exit(x2);
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}
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return spmd_smc_forward(smc_fid, secure_origin,
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x1, x2, x3, x4, handle);
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break; /* not reached */
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case FFA_VERSION:
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input_version = (uint32_t)(0xFFFFFFFF & x1);
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/*
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* If caller is secure and SPMC was initialized,
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* return FFA_VERSION of SPMD.
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* If caller is non secure and SPMC was initialized,
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* return SPMC's version.
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* Sanity check to "input_version".
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*/
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if ((input_version & FFA_VERSION_BIT31_MASK) ||
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(ctx->state == SPMC_STATE_RESET)) {
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ret = FFA_ERROR_NOT_SUPPORTED;
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} else if (!secure_origin) {
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ret = MAKE_FFA_VERSION(spmc_attrs.major_version, spmc_attrs.minor_version);
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} else {
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ret = MAKE_FFA_VERSION(FFA_VERSION_MAJOR, FFA_VERSION_MINOR);
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}
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SMC_RET8(handle, ret, FFA_TARGET_INFO_MBZ, FFA_TARGET_INFO_MBZ,
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FFA_PARAM_MBZ, FFA_PARAM_MBZ, FFA_PARAM_MBZ,
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FFA_PARAM_MBZ, FFA_PARAM_MBZ);
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break; /* not reached */
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case FFA_FEATURES:
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/*
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* This is an optional interface. Do the minimal checks and
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* forward to SPM Core which will handle it if implemented.
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*/
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/*
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* Check if x1 holds a valid FFA fid. This is an
|
|
* optimization.
|
|
*/
|
|
if (!is_ffa_fid(x1)) {
|
|
return spmd_ffa_error_return(handle,
|
|
FFA_ERROR_NOT_SUPPORTED);
|
|
}
|
|
|
|
/* Forward SMC from Normal world to the SPM Core */
|
|
if (!secure_origin) {
|
|
return spmd_smc_forward(smc_fid, secure_origin,
|
|
x1, x2, x3, x4, handle);
|
|
}
|
|
|
|
/*
|
|
* Return success if call was from secure world i.e. all
|
|
* FFA functions are supported. This is essentially a
|
|
* nop.
|
|
*/
|
|
SMC_RET8(handle, FFA_SUCCESS_SMC32, x1, x2, x3, x4,
|
|
SMC_GET_GP(handle, CTX_GPREG_X5),
|
|
SMC_GET_GP(handle, CTX_GPREG_X6),
|
|
SMC_GET_GP(handle, CTX_GPREG_X7));
|
|
|
|
break; /* not reached */
|
|
|
|
case FFA_ID_GET:
|
|
/*
|
|
* Returns the ID of the calling FFA component.
|
|
*/
|
|
if (!secure_origin) {
|
|
SMC_RET8(handle, FFA_SUCCESS_SMC32,
|
|
FFA_TARGET_INFO_MBZ, FFA_NS_ENDPOINT_ID,
|
|
FFA_PARAM_MBZ, FFA_PARAM_MBZ,
|
|
FFA_PARAM_MBZ, FFA_PARAM_MBZ,
|
|
FFA_PARAM_MBZ);
|
|
}
|
|
|
|
SMC_RET8(handle, FFA_SUCCESS_SMC32,
|
|
FFA_TARGET_INFO_MBZ, spmc_attrs.spmc_id,
|
|
FFA_PARAM_MBZ, FFA_PARAM_MBZ,
|
|
FFA_PARAM_MBZ, FFA_PARAM_MBZ,
|
|
FFA_PARAM_MBZ);
|
|
|
|
break; /* not reached */
|
|
|
|
case FFA_MSG_SEND_DIRECT_REQ_SMC32:
|
|
if (secure_origin && spmd_is_spmc_message(x1)) {
|
|
ret = spmd_handle_spmc_message(x3, x4,
|
|
SMC_GET_GP(handle, CTX_GPREG_X5),
|
|
SMC_GET_GP(handle, CTX_GPREG_X6),
|
|
SMC_GET_GP(handle, CTX_GPREG_X7));
|
|
|
|
SMC_RET8(handle, FFA_SUCCESS_SMC32,
|
|
FFA_TARGET_INFO_MBZ, ret,
|
|
FFA_PARAM_MBZ, FFA_PARAM_MBZ,
|
|
FFA_PARAM_MBZ, FFA_PARAM_MBZ,
|
|
FFA_PARAM_MBZ);
|
|
} else {
|
|
/* Forward direct message to the other world */
|
|
return spmd_smc_forward(smc_fid, secure_origin,
|
|
x1, x2, x3, x4, handle);
|
|
}
|
|
break; /* Not reached */
|
|
|
|
case FFA_MSG_SEND_DIRECT_RESP_SMC32:
|
|
if (secure_origin && spmd_is_spmc_message(x1)) {
|
|
spmd_spm_core_sync_exit(0);
|
|
} else {
|
|
/* Forward direct message to the other world */
|
|
return spmd_smc_forward(smc_fid, secure_origin,
|
|
x1, x2, x3, x4, handle);
|
|
}
|
|
break; /* Not reached */
|
|
|
|
case FFA_RX_RELEASE:
|
|
case FFA_RXTX_MAP_SMC32:
|
|
case FFA_RXTX_MAP_SMC64:
|
|
case FFA_RXTX_UNMAP:
|
|
case FFA_PARTITION_INFO_GET:
|
|
/*
|
|
* Should not be allowed to forward FFA_PARTITION_INFO_GET
|
|
* from Secure world to Normal world
|
|
*
|
|
* Fall through to forward the call to the other world
|
|
*/
|
|
case FFA_MSG_RUN:
|
|
/* This interface must be invoked only by the Normal world */
|
|
|
|
if (secure_origin) {
|
|
return spmd_ffa_error_return(handle,
|
|
FFA_ERROR_NOT_SUPPORTED);
|
|
}
|
|
|
|
/* Fall through to forward the call to the other world */
|
|
case FFA_MSG_SEND:
|
|
case FFA_MSG_SEND_DIRECT_REQ_SMC64:
|
|
case FFA_MSG_SEND_DIRECT_RESP_SMC64:
|
|
case FFA_MEM_DONATE_SMC32:
|
|
case FFA_MEM_DONATE_SMC64:
|
|
case FFA_MEM_LEND_SMC32:
|
|
case FFA_MEM_LEND_SMC64:
|
|
case FFA_MEM_SHARE_SMC32:
|
|
case FFA_MEM_SHARE_SMC64:
|
|
case FFA_MEM_RETRIEVE_REQ_SMC32:
|
|
case FFA_MEM_RETRIEVE_REQ_SMC64:
|
|
case FFA_MEM_RETRIEVE_RESP:
|
|
case FFA_MEM_RELINQUISH:
|
|
case FFA_MEM_RECLAIM:
|
|
case FFA_SUCCESS_SMC32:
|
|
case FFA_SUCCESS_SMC64:
|
|
/*
|
|
* TODO: Assume that no requests originate from EL3 at the
|
|
* moment. This will change if a SP service is required in
|
|
* response to secure interrupts targeted to EL3. Until then
|
|
* simply forward the call to the Normal world.
|
|
*/
|
|
|
|
return spmd_smc_forward(smc_fid, secure_origin,
|
|
x1, x2, x3, x4, handle);
|
|
break; /* not reached */
|
|
|
|
case FFA_MSG_WAIT:
|
|
/*
|
|
* Check if this is the first invocation of this interface on
|
|
* this CPU from the Secure world. If so, then indicate that the
|
|
* SPM Core initialised successfully.
|
|
*/
|
|
if (secure_origin && (ctx->state == SPMC_STATE_ON_PENDING)) {
|
|
spmd_spm_core_sync_exit(0);
|
|
}
|
|
|
|
/* Fall through to forward the call to the other world */
|
|
|
|
case FFA_MSG_YIELD:
|
|
/* This interface must be invoked only by the Secure world */
|
|
if (!secure_origin) {
|
|
return spmd_ffa_error_return(handle,
|
|
FFA_ERROR_NOT_SUPPORTED);
|
|
}
|
|
|
|
return spmd_smc_forward(smc_fid, secure_origin,
|
|
x1, x2, x3, x4, handle);
|
|
break; /* not reached */
|
|
|
|
default:
|
|
WARN("SPM: Unsupported call 0x%08x\n", smc_fid);
|
|
return spmd_ffa_error_return(handle, FFA_ERROR_NOT_SUPPORTED);
|
|
}
|
|
}
|