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# CPU INFOrmation library
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[![BSD (2 clause) License](https://img.shields.io/badge/License-BSD%202--Clause%20%22Simplified%22%20License-blue.svg)](https://github.com/pytorch/cpuinfo/blob/master/LICENSE)
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[![Linux/Mac build status](https://img.shields.io/travis/pytorch/cpuinfo.svg)](https://travis-ci.org/pytorch/cpuinfo)
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[![Windows build status](https://ci.appveyor.com/api/projects/status/g5khy9nr0xm458t7/branch/master?svg=true)](https://ci.appveyor.com/project/MaratDukhan/cpuinfo/branch/master)
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cpuinfo is a library to detect essential for performance optimization information about host CPU.
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## Features
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- **Cross-platform** availability:
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- Linux, Windows, macOS, Android, and iOS operating systems
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- x86, x86-64, ARM, and ARM64 architectures
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- Modern **C/C++ interface**
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- Thread-safe
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- No memory allocation after initialization
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- No exceptions thrown
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- Detection of **supported instruction sets**, up to AVX512 (x86) and ARMv8.3 extensions
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- Detection of SoC and core information:
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- **Processor (SoC) name**
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- Vendor and **microarchitecture** for each CPU core
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- ID (**MIDR** on ARM, **CPUID** leaf 1 EAX value on x86) for each CPU core
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- Detection of **cache information**:
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- Cache type (instruction/data/unified), size and line size
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- Cache associativity
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- Cores and logical processors (hyper-threads) sharing the cache
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- Detection of **topology information** (relative between logical processors, cores, and processor packages)
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- Well-tested **production-quality** code:
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- 60+ mock tests based on data from real devices
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- Includes work-arounds for common bugs in hardware and OS kernels
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- Supports systems with heterogenous cores, such as **big.LITTLE** and Max.Med.Min
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- Permissive **open-source** license (Simplified BSD)
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## Examples
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Log processor name:
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```c
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cpuinfo_initialize();
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printf("Running on %s CPU\n", cpuinfo_get_package(0)->name);
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```
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Detect if target is a 32-bit or 64-bit ARM system:
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```c
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#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64
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/* 32-bit ARM-specific code here */
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#endif
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```
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Check if the host CPU support ARM NEON
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```c
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cpuinfo_initialize();
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if (cpuinfo_has_arm_neon()) {
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neon_implementation(arguments);
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}
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```
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Check if the host CPU supports x86 AVX
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```c
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cpuinfo_initialize();
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if (cpuinfo_has_x86_avx()) {
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avx_implementation(arguments);
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}
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```
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Check if the thread runs on a Cortex-A53 core
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```c
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cpuinfo_initialize();
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switch (cpuinfo_get_current_core()->uarch) {
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case cpuinfo_uarch_cortex_a53:
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cortex_a53_implementation(arguments);
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break;
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default:
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generic_implementation(arguments);
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break;
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}
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```
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Get the size of level 1 data cache on the fastest core in the processor (e.g. big core in big.LITTLE ARM systems):
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```c
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cpuinfo_initialize();
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const size_t l1_size = cpuinfo_get_processor(0)->cache.l1d->size;
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```
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Pin thread to cores sharing L2 cache with the current core (Linux or Android)
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```c
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cpuinfo_initialize();
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cpu_set_t cpu_set;
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CPU_ZERO(&cpu_set);
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const struct cpuinfo_cache* current_l2 = cpuinfo_get_current_processor()->cache.l2;
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for (uint32_t i = 0; i < current_l2->processor_count; i++) {
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CPU_SET(cpuinfo_get_processor(current_l2->processor_start + i)->linux_id, &cpu_set);
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}
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pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpu_set);
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```
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## Exposed information
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- [x] Processor (SoC) name
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- [x] Microarchitecture
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- [x] Usable instruction sets
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- [ ] CPU frequency
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- [x] Cache
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- [x] Size
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- [x] Associativity
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- [x] Line size
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- [x] Number of partitions
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- [x] Flags (unified, inclusive, complex hash function)
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- [x] Topology (logical processors that share this cache level)
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- [ ] TLB
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- [ ] Number of entries
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- [ ] Associativity
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- [ ] Covered page types (instruction, data)
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- [ ] Covered page sizes
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- [x] Topology information
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- [x] Logical processors
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- [x] Cores
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- [x] Packages (sockets)
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## Supported environments:
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- [x] Android
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- [x] x86 ABI
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- [x] x86_64 ABI
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- [x] armeabi ABI
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- [x] armeabiv7-a ABI
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- [x] arm64-v8a ABI
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- [ ] ~~mips ABI~~
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- [ ] ~~mips64 ABI~~
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- [x] Linux
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- [x] x86
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- [x] x86-64
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- [x] 32-bit ARM (ARMv5T and later)
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- [x] ARM64
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- [ ] PowerPC64
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- [x] iOS
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- [x] x86 (iPhone simulator)
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- [x] x86-64 (iPhone simulator)
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- [x] ARMv7
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- [x] ARM64
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- [x] OS X
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- [x] x86
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- [x] x86-64
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- [x] Windows
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- [x] x86
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- [x] x86-64
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## Methods
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- Processor (SoC) name detection
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- [x] Using CPUID leaves 0x80000002–0x80000004 on x86/x86-64
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- [x] Using `/proc/cpuinfo` on ARM
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- [x] Using `ro.chipname`, `ro.board.platform`, `ro.product.board`, `ro.mediatek.platform`, `ro.arch` properties (Android)
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- [ ] Using kernel log (`dmesg`) on ARM Linux
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- Vendor and microarchitecture detection
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- [x] Intel-designed x86/x86-64 cores (up to Sunny Cove, Goldmont Plus, and Knights Mill)
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- [x] AMD-designed x86/x86-64 cores (up to Puma/Jaguar and Zen 2)
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- [ ] VIA-designed x86/x86-64 cores
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- [ ] Other x86 cores (DM&P, RDC, Transmeta, Cyrix, Rise)
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- [x] ARM-designed ARM cores (up to Cortex-A55, Cortex-A77, and Neoverse E1/N1)
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- [x] Qualcomm-designed ARM cores (Scorpion, Krait, and Kryo)
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- [x] Nvidia-designed ARM cores (Denver and Carmel)
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- [x] Samsung-designed ARM cores (Exynos)
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- [x] Intel-designed ARM cores (XScale up to 3rd-gen)
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- [x] Apple-designed ARM cores (up to Lightning and Thunder)
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- [x] Cavium-designed ARM cores (ThunderX)
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- [x] AppliedMicro-designed ARM cores (X-Gene)
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- Instruction set detection
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- [x] Using CPUID (x86/x86-64)
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- [x] Using `/proc/cpuinfo` on 32-bit ARM EABI (Linux)
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- [x] Using microarchitecture heuristics on (32-bit ARM)
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- [x] Using `FPSID` and `WCID` registers (32-bit ARM)
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- [x] Using `getauxval` (Linux/ARM)
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- [x] Using `/proc/self/auxv` (Android/ARM)
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- [ ] Using instruction probing on ARM (Linux)
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- [ ] Using CPUID registers on ARM64 (Linux)
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- Cache detection
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- [x] Using CPUID leaf 0x00000002 (x86/x86-64)
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- [x] Using CPUID leaf 0x00000004 (non-AMD x86/x86-64)
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- [ ] Using CPUID leaves 0x80000005-0x80000006 (AMD x86/x86-64)
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- [x] Using CPUID leaf 0x8000001D (AMD x86/x86-64)
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- [x] Using `/proc/cpuinfo` (Linux/pre-ARMv7)
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- [x] Using microarchitecture heuristics (ARM)
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- [x] Using chipset name (ARM)
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- [x] Using `sysctlbyname` (Mach)
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- [x] Using sysfs `typology` directories (ARM/Linux)
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- [ ] Using sysfs `cache` directories (Linux)
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- TLB detection
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- [x] Using CPUID leaf 0x00000002 (x86/x86-64)
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- [ ] Using CPUID leaves 0x80000005-0x80000006 and 0x80000019 (AMD x86/x86-64)
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- [x] Using microarchitecture heuristics (ARM)
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- Topology detection
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- [x] Using CPUID leaf 0x00000001 on x86/x86-64 (legacy APIC ID)
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- [x] Using CPUID leaf 0x0000000B on x86/x86-64 (Intel APIC ID)
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- [ ] Using CPUID leaf 0x8000001E on x86/x86-64 (AMD APIC ID)
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- [x] Using `/proc/cpuinfo` (Linux)
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- [x] Using `host_info` (Mach)
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- [x] Using `GetLogicalProcessorInformationEx` (Windows)
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- [x] Using sysfs (Linux)
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- [x] Using chipset name (ARM/Linux)
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