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150 lines
4.2 KiB
150 lines
4.2 KiB
// Copyright 2017 The Gemmlowp Authors. All Rights Reserved.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// simd_wrappers_neon.h: SSE SIMD wrappers
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#ifndef GEMMLOWP_INTERNAL_SIMD_WRAPPERS_SSE_H_
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#define GEMMLOWP_INTERNAL_SIMD_WRAPPERS_SSE_H_
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#include <smmintrin.h>
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namespace gemmlowp {
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using Int32x4 = __m128i;
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using Int16x8 = __m128i;
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using Uint8x16 = __m128i;
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template <int ScalarCount>
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struct RegisterType<std::int32_t, ScalarCount> {
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using Type =
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typename std::conditional<ScalarCount >= 4, Int32x4, std::int32_t>::type;
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};
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template <int ScalarCount>
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struct RegisterType<std::int16_t, ScalarCount> {
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using Type =
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typename std::conditional<ScalarCount >= 8, Int16x8, std::int16_t>::type;
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};
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template <int ScalarCount>
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struct RegisterType<std::uint8_t, ScalarCount> {
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using Type = typename std::conditional<
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ScalarCount >= 16, Uint8x16,
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typename std::conditional<ScalarCount >= 4, std::uint32_t,
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std::uint8_t>::type>::type;
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};
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inline Int32x4 LoadInt32x4(const std::int32_t* src) {
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return _mm_loadu_si128(reinterpret_cast<const Int32x4*>(src));
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}
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inline Int32x4 LoadInt16x8(const std::int16_t* src) {
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return _mm_loadu_si128(reinterpret_cast<const Int16x8*>(src));
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}
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inline void StoreInt32x4(std::int32_t* dst, Int32x4 value) {
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_mm_storeu_si128(reinterpret_cast<__m128i*>(dst), value);
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}
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inline void StoreInt16x8(std::int16_t* dst, Int16x8 value) {
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_mm_storeu_si128(reinterpret_cast<__m128i*>(dst), value);
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}
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inline Uint8x16 LoadUint8x16(const std::uint8_t* src) {
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return _mm_loadu_si128(reinterpret_cast<const Uint8x16*>(src));
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}
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inline void StoreUint8x16(std::uint8_t* dst, Uint8x16 value) {
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_mm_storeu_si128(reinterpret_cast<__m128i*>(dst), value);
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}
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template <int Lane>
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std::int32_t GetLane(Int32x4 value) {
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return _mm_extract_epi32(value, Lane);
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}
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template <int Lane>
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Int32x4 DupLane(Int32x4 value) {
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return _mm_shuffle_epi32(value, _MM_SHUFFLE(Lane, Lane, Lane, Lane));
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}
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inline Int32x4 Mul(Int32x4 a, std::int32_t b) {
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return Mul(a, Dup<Int32x4>(b));
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}
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inline Int32x4 Min(Int32x4 a, Int32x4 b) { return _mm_min_epi32(a, b); }
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inline Int32x4 Max(Int32x4 a, Int32x4 b) { return _mm_max_epi32(a, b); }
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inline Int32x4 SaturatingRoundingDoublingHighMul(Int32x4 a, std::int32_t b) {
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return SaturatingRoundingDoublingHighMul(a, Dup<Int32x4>(b));
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}
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template <int Lane>
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Int32x4 MulByRhsLane(Int32x4 a, Int32x4 b) {
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return Mul(a, DupLane<Lane>(b));
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}
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inline void MulAdd(Int32x4 lhs, Int32x4 rhs, Int32x4* acc) {
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*acc = Add(*acc, Mul(lhs, rhs));
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}
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inline void MulAdd(Int32x4 lhs, std::int32_t rhs, Int32x4* acc) {
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*acc = Add(*acc, Mul(lhs, rhs));
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}
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template <int Lane>
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inline void MulAddByRhsLane(Int32x4 lhs, Int32x4 rhs, Int32x4* acc) {
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*acc = Add(*acc, MulByRhsLane<Lane>(lhs, rhs));
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}
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template <>
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struct LoadContiguousImpl<RegBlockUint8<8, 8>> {
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static RegBlockUint8<8, 8> Run(const std::uint8_t* src) {
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RegBlockUint8<8, 8> result;
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for (int i = 0; i < 4; i++) {
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result.buf.reg[i] = LoadUint8x16(src + 16 * i);
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}
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return result;
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}
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};
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template <>
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struct LoadContiguousImpl<RegBlockInt32<8, 8>> {
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static RegBlockInt32<8, 8> Run(const std::int32_t* src) {
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RegBlockInt32<8, 8> result;
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for (int i = 0; i < 16; i++) {
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result.buf.reg[i] = LoadInt32x4(src + 4 * i);
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}
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return result;
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}
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};
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template <>
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struct LoadContiguousImpl<RegBlockInt16<8, 8>> {
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static RegBlockInt16<8, 8> Run(const std::int16_t* src) {
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RegBlockInt16<8, 8> result;
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for (int i = 0; i < 8; i++) {
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result.buf.reg[i] = LoadInt16x8(src + 8 * i);
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}
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return result;
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}
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};
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} // end namespace gemmlowp
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#include "simd_wrappers_common_neon_sse.h"
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#endif // GEMMLOWP_INTERNAL_SIMD_WRAPPERS_SSE_H_
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