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164 lines
4.0 KiB
164 lines
4.0 KiB
#ifndef GEN7_MEDIA_H
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#define GEN7_MEDIA_H
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#include <stdint.h>
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#include "surfaceformat.h"
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#define GEN7_FLOATING_POINT_IEEE_754 0
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#define GEN7_FLOATING_POINT_NON_IEEE_754 1
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#define GFXPIPE(Pipeline,Opcode,Subopcode) ((3 << 29) | \
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((Pipeline) << 27) | \
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((Opcode) << 24) | \
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((Subopcode) << 16))
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#define GEN7_PIPELINE_SELECT GFXPIPE(1, 1, 4)
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# define PIPELINE_SELECT_3D (0 << 0)
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# define PIPELINE_SELECT_MEDIA (1 << 0)
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# define PIPELINE_SELECT_GPGPU (2 << 0)
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#define GEN7_STATE_BASE_ADDRESS GFXPIPE(0, 1, 1)
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# define BASE_ADDRESS_MODIFY (1 << 0)
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#define GEN7_MEDIA_VFE_STATE GFXPIPE(2, 0, 0)
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#define GEN7_MEDIA_CURBE_LOAD GFXPIPE(2, 0, 1)
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#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD GFXPIPE(2, 0, 2)
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#define GEN7_MEDIA_OBJECT GFXPIPE(2, 1, 0)
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#define GEN7_GPGPU_WALKER GFXPIPE(2, 1, 5)
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struct gen7_interface_descriptor_data
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{
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struct {
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uint32_t pad0:6;
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uint32_t kernel_start_pointer:26;
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} desc0;
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struct {
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uint32_t pad0:7;
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uint32_t software_exception_enable:1;
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uint32_t pad1:3;
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uint32_t maskstack_exception_enable:1;
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uint32_t pad2:1;
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uint32_t illegal_opcode_exception_enable:1;
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uint32_t pad3:2;
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uint32_t floating_point_mode:1;
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uint32_t thread_priority:1;
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uint32_t single_program_flow:1;
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uint32_t pad4:13;
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} desc1;
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struct {
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uint32_t pad0:2;
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uint32_t sampler_count:3;
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uint32_t sampler_state_pointer:27;
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} desc2;
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struct {
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uint32_t binding_table_entry_count:5;
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uint32_t binding_table_pointer:27;
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} desc3;
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struct {
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uint32_t constant_urb_entry_read_offset:16;
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uint32_t constant_urb_entry_read_length:16;
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} desc4;
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struct {
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uint32_t num_threads:8;
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uint32_t barrier_return_byte:8;
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uint32_t shared_local_memory_size:5;
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uint32_t barrier_enable:1;
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uint32_t rounding_mode:2;
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uint32_t barrier_return_grf_offset:8;
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} desc5;
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struct {
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uint32_t cross_thread_constant_data_read_length:8;
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uint32_t pad0:24;
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} desc6;
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struct {
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uint32_t pad0;
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} desc7;
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};
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struct gen7_surface_state
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{
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struct {
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uint32_t cube_pos_z:1;
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uint32_t cube_neg_z:1;
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uint32_t cube_pos_y:1;
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uint32_t cube_neg_y:1;
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uint32_t cube_pos_x:1;
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uint32_t cube_neg_x:1;
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uint32_t pad2:2;
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uint32_t render_cache_read_write:1;
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uint32_t pad1:1;
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uint32_t surface_array_spacing:1;
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uint32_t vert_line_stride_ofs:1;
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uint32_t vert_line_stride:1;
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uint32_t tiled_mode:2;
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uint32_t horizontal_alignment:1;
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uint32_t vertical_alignment:2;
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uint32_t surface_format:9; /**< BRW_SURFACEFORMAT_x */
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uint32_t pad0:1;
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uint32_t is_array:1;
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uint32_t surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */
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} ss0;
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struct {
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uint32_t base_addr;
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} ss1;
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struct {
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uint32_t width:14;
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uint32_t pad1:2;
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uint32_t height:14;
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uint32_t pad0:2;
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} ss2;
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struct {
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uint32_t pitch:18;
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uint32_t pad:3;
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uint32_t depth:11;
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} ss3;
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struct {
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uint32_t multisample_position_palette_index:3;
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uint32_t num_multisamples:3;
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uint32_t multisampled_surface_storage_format:1;
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uint32_t render_target_view_extent:11;
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uint32_t min_array_elt:11;
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uint32_t rotation:2;
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uint32_t pad0:1;
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} ss4;
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struct {
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uint32_t mip_count:4;
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uint32_t min_lod:4;
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uint32_t pad1:12;
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uint32_t y_offset:4;
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uint32_t pad0:1;
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uint32_t x_offset:7;
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} ss5;
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struct {
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uint32_t pad; /* Multisample Control Surface stuff */
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} ss6;
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struct {
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uint32_t resource_min_lod:12;
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uint32_t pad0:4;
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uint32_t shader_chanel_select_a:3;
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uint32_t shader_chanel_select_b:3;
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uint32_t shader_chanel_select_g:3;
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uint32_t shader_chanel_select_r:3;
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uint32_t alpha_clear_color:1;
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uint32_t blue_clear_color:1;
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uint32_t green_clear_color:1;
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uint32_t red_clear_color:1;
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} ss7;
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};
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#endif /* GEN7_MEDIA_H */
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