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139 lines
2.6 KiB
139 lines
2.6 KiB
#ifndef GEN9_RENDER_H
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#define GEN9_RENDER_H
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#include "gen8_render.h"
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#define GEN9_3DSTATE_COMPONENT_PACKING GEN4_3D(3, 0, 0x55)
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#define GEN9_SBE_ACTIVE_COMPONENT_NONE 0
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#define GEN9_SBE_ACTIVE_COMPONENT_XY 1
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#define GEN9_SBE_ACTIVE_COMPONENT_XYZ 2
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#define GEN9_SBE_ACTIVE_COMPONENT_XYZW 3
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#define GEN9_PIPELINE_SELECTION_MASK (3 << 8)
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#define GEN9_PIPELINE_SELECT (GEN4_3D(1, 1, 4) | (3 << 8))
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#define GEN9_3DSTATE_MULTISAMPLE_NUMSAMPLES_16 (4 << 1)
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/* Shamelessly ripped from mesa */
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struct gen9_surface_state {
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struct {
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uint32_t cube_pos_z:1;
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uint32_t cube_neg_z:1;
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uint32_t cube_pos_y:1;
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uint32_t cube_neg_y:1;
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uint32_t cube_pos_x:1;
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uint32_t cube_neg_x:1;
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uint32_t media_boundary_pixel_mode:2;
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uint32_t render_cache_read_write:1;
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uint32_t smapler_l2_bypass:1;
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uint32_t vert_line_stride_ofs:1;
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uint32_t vert_line_stride:1;
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uint32_t tiled_mode:2;
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uint32_t horizontal_alignment:2;
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uint32_t vertical_alignment:2;
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uint32_t surface_format:9; /**< BRW_SURFACEFORMAT_x */
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uint32_t pad0:1;
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uint32_t is_array:1;
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uint32_t surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */
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} ss0;
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struct {
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uint32_t qpitch:15;
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uint32_t pad1:4;
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uint32_t base_mip_level:5;
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uint32_t memory_object_control:7;
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uint32_t pad0:1;
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} ss1;
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struct {
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uint32_t width:14;
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uint32_t pad1:2;
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uint32_t height:14;
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uint32_t pad0:2;
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} ss2;
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struct {
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uint32_t pitch:18;
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uint32_t pad:3;
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uint32_t depth:11;
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} ss3;
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struct {
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uint32_t minimum_array_element:27;
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uint32_t pad0:5;
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} ss4;
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struct {
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uint32_t mip_count:4;
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uint32_t min_lod:4;
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uint32_t mip_tail_start_lod:4;
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uint32_t pad3:2;
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uint32_t coherency_type:1;
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uint32_t pad2:3;
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uint32_t trmode:2;
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uint32_t ewa_disable_for_cube:1;
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uint32_t y_offset:3;
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uint32_t pad0:1;
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uint32_t x_offset:7;
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} ss5;
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struct {
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uint32_t aux_mode:3;
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uint32_t aux_pitch:9;
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uint32_t pad0:4;
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uint32_t aux_qpitch:15;
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uint32_t pad1:1;
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} ss6;
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struct {
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uint32_t resource_min_lod:12;
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/* Only on Haswell */
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uint32_t pad0:4;
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uint32_t shader_chanel_select_a:3;
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uint32_t shader_chanel_select_b:3;
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uint32_t shader_chanel_select_g:3;
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uint32_t shader_chanel_select_r:3;
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uint32_t alpha_clear_color:1;
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uint32_t blue_clear_color:1;
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uint32_t green_clear_color:1;
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uint32_t red_clear_color:1;
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} ss7;
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struct {
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uint32_t base_addr;
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} ss8;
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struct {
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uint32_t base_addr_hi;
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} ss9;
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struct {
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uint32_t aux_base_addr;
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} ss10;
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struct {
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uint32_t aux_base_addr_hi;
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} ss11;
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struct {
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uint32_t hiz_depth_clear_value;
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} ss12;
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struct {
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uint32_t reserved;
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} ss13;
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struct {
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uint32_t reserved;
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} ss14;
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struct {
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uint32_t reserved;
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} ss15;
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};
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#endif
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