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461 lines
12 KiB
461 lines
12 KiB
/*
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* Copyright © 2018 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include "drm_mode.h"
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#include "drm_fourcc.h"
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#include "igt.h"
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IGT_TEST_DESCRIPTION("CRC test all different plane modes which kernel advertises.");
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typedef struct {
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int gfx_fd;
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igt_display_t display;
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enum igt_commit_style commit;
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struct igt_fb fb;
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struct igt_fb primary_fb;
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union {
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char name[5];
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uint32_t dword;
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} format;
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bool separateprimaryplane;
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uint32_t gem_handle;
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uint32_t gem_handle_yuv;
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unsigned int size;
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unsigned char* buf;
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/*
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* comparison crcs
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*/
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igt_pipe_crc_t *pipe_crc;
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igt_crc_t cursor_crc;
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igt_crc_t fullscreen_crc;
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} data_t;
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static void do_write(int fd, int handle, void *buf, int size)
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{ void *screenbuf;
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gem_set_domain(fd, handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
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screenbuf = gem_mmap__gtt(fd, handle, size, PROT_WRITE);
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memcpy(screenbuf, buf, size);
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gem_munmap(screenbuf, size);
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gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
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gem_sync(fd, handle);
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}
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static void generate_comparison_crc_list(data_t *data, igt_output_t *output)
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{
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drmModeModeInfo *mode;
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uint64_t w, h;
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int fbid;
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cairo_t *cr;
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igt_plane_t *primary;
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mode = igt_output_get_mode(output);
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fbid = igt_create_color_fb(data->gfx_fd,
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mode->hdisplay,
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mode->vdisplay,
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DRM_FORMAT_XRGB8888,
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LOCAL_DRM_FORMAT_MOD_NONE,
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0, 0, 0,
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&data->primary_fb);
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igt_assert(fbid);
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drmGetCap(data->gfx_fd, DRM_CAP_CURSOR_WIDTH, &w);
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drmGetCap(data->gfx_fd, DRM_CAP_CURSOR_HEIGHT, &h);
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cr = igt_get_cairo_ctx(data->gfx_fd, &data->primary_fb);
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igt_paint_color(cr, 0, 0, mode->hdisplay, mode->vdisplay,
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0.0, 0.0, 0.0);
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igt_paint_color(cr, 0, 0, w, h, 1.0, 1.0, 1.0);
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igt_assert(cairo_status(cr) == 0);
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igt_put_cairo_ctx(data->gfx_fd, &data->primary_fb, cr);
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primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
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igt_plane_set_fb(primary, &data->primary_fb);
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igt_display_commit2(&data->display, data->commit);
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igt_pipe_crc_get_current(data->gfx_fd, data->pipe_crc, &data->cursor_crc);
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igt_plane_set_fb(primary, NULL);
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igt_display_commit2(&data->display, data->commit);
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cr = igt_get_cairo_ctx(data->gfx_fd, &data->primary_fb);
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igt_paint_color(cr, 0, 0, mode->hdisplay, mode->vdisplay, 1.0, 1.0, 1.0);
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igt_put_cairo_ctx(data->gfx_fd, &data->primary_fb, cr);
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igt_plane_set_fb(primary, &data->primary_fb);
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igt_display_commit2(&data->display, data->commit);
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igt_pipe_crc_get_current(data->gfx_fd, data->pipe_crc, &data->fullscreen_crc);
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igt_remove_fb(data->gfx_fd, &data->primary_fb);
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}
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static const struct {
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uint32_t fourcc;
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char zeropadding;
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enum { BYTES_PP_1 = 1,
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BYTES_PP_4 = 4} bpp;
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uint32_t value;
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} fillers[] = {
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{ DRM_FORMAT_XBGR2101010, 0, BYTES_PP_4, 0xffffffff},
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{ 0, 0, 0, 0 }
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};
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/*
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* fill_in_fb tell in return value if selected mode should be
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* proceed to crc check
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*/
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static bool fill_in_fb(data_t *data, igt_output_t *output, igt_plane_t *plane,
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uint32_t format)
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{
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signed i, c, writesize;
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unsigned int* ptemp_32_buf;
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for (i = 0; i < ARRAY_SIZE(fillers)-1; i++) {
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if (fillers[i].fourcc == format)
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break;
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}
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switch (fillers[i].bpp) {
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case BYTES_PP_4:
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ptemp_32_buf = (unsigned int*)data->buf;
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for (c = 0; c < data->size/4; c++)
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ptemp_32_buf[c] = fillers[i].value;
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writesize = data->size;
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break;
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case BYTES_PP_1:
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memset((void *)data->buf, fillers[i].value, data->size);
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writesize = data->size;
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break;
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default:
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igt_assert_f(0, "unknown bpp");
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}
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do_write(data->gfx_fd, data->gem_handle, (void*)data->buf, writesize);
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return true;
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}
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static bool setup_fb(data_t *data, igt_output_t *output, igt_plane_t *plane,
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uint32_t format)
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{
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drmModeModeInfo *mode;
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uint64_t w, h;
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signed ret, gemsize = 0;
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unsigned tile_width, tile_height;
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int num_planes = 1;
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uint64_t tiling;
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int bpp = 0;
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int i;
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mode = igt_output_get_mode(output);
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if (plane->type != DRM_PLANE_TYPE_CURSOR) {
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w = mode->hdisplay;
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h = mode->vdisplay;
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tiling = LOCAL_I915_FORMAT_MOD_X_TILED;
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} else {
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drmGetCap(data->gfx_fd, DRM_CAP_CURSOR_WIDTH, &w);
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drmGetCap(data->gfx_fd, DRM_CAP_CURSOR_HEIGHT, &h);
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tiling = LOCAL_DRM_FORMAT_MOD_NONE;
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}
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for (i = 0; i < ARRAY_SIZE(fillers)-1; i++) {
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if (fillers[i].fourcc == format)
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break;
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}
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switch (fillers[i].bpp) {
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case BYTES_PP_1:
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bpp = 8;
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break;
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case BYTES_PP_4:
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bpp = 32;
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break;
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default:
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igt_assert_f(0, "unknown bpp");
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}
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igt_get_fb_tile_size(data->gfx_fd, tiling, bpp,
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&tile_width, &tile_height);
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data->fb.offsets[0] = 0;
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data->fb.strides[0] = ALIGN(w * bpp / 8, tile_width);
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gemsize = data->size = data->fb.strides[0] * ALIGN(h, tile_height);
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data->buf = (unsigned char *)calloc(data->size*2, 1);
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data->gem_handle = gem_create(data->gfx_fd, gemsize);
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ret = __gem_set_tiling(data->gfx_fd, data->gem_handle,
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igt_fb_mod_to_tiling(tiling),
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data->fb.strides[0]);
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data->fb.gem_handle = data->gem_handle;
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data->fb.width = w;
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data->fb.height = h;
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fill_in_fb(data, output, plane, format);
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igt_assert_eq(ret, 0);
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ret = __kms_addfb(data->gfx_fd, data->gem_handle, w, h,
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format, tiling, data->fb.strides, data->fb.offsets,
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num_planes, LOCAL_DRM_MODE_FB_MODIFIERS,
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&data->fb.fb_id);
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if(ret < 0) {
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igt_info("Creating fb for format %s failed, return code %d\n",
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(char*)&data->format.name, ret);
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return false;
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}
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return true;
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}
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static void remove_fb(data_t* data, igt_output_t* output, igt_plane_t* plane)
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{
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if (data->separateprimaryplane) {
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igt_plane_t* primary = igt_output_get_plane_type(output,
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DRM_PLANE_TYPE_PRIMARY);
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igt_plane_set_fb(primary, NULL);
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igt_remove_fb(data->gfx_fd, &data->primary_fb);
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data->separateprimaryplane = false;
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}
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igt_remove_fb(data->gfx_fd, &data->fb);
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free(data->buf);
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data->buf = NULL;
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}
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static bool prepare_crtc(data_t *data, igt_output_t *output,
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igt_plane_t *plane, uint32_t format)
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{
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drmModeModeInfo *mode;
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igt_plane_t *primary;
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if (plane->type != DRM_PLANE_TYPE_PRIMARY) {
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mode = igt_output_get_mode(output);
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igt_create_color_fb(data->gfx_fd,
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mode->hdisplay, mode->vdisplay,
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DRM_FORMAT_XRGB8888,
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LOCAL_DRM_FORMAT_MOD_NONE,
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0, 0, 0,
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&data->primary_fb);
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primary = igt_output_get_plane_type(output,
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DRM_PLANE_TYPE_PRIMARY);
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igt_plane_set_fb(primary, &data->primary_fb);
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igt_display_commit2(&data->display, data->commit);
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data->separateprimaryplane = true;
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}
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if (!setup_fb(data, output, plane, format))
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return false;
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return true;
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}
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static int
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test_one_mode(data_t* data, igt_output_t *output, igt_plane_t* plane,
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int mode, enum pipe pipe)
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{
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igt_crc_t current_crc;
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signed rVal = 0;
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int i;
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/*
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* Limit tests only to those fb formats listed in fillers table
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*/
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for (i = 0; i < ARRAY_SIZE(fillers)-1; i++) {
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if (fillers[i].fourcc == mode)
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break;
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}
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if (fillers[i].bpp == 0)
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return false;
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if (prepare_crtc(data, output, plane, mode)) {
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igt_plane_set_fb(plane, &data->fb);
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igt_fb_set_size(&data->fb, plane, data->fb.width, data->fb.height);
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igt_plane_set_size(plane, data->fb.width, data->fb.height);
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igt_fb_set_position(&data->fb, plane, 0, 0);
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igt_display_commit2(&data->display, data->commit);
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igt_wait_for_vblank(data->gfx_fd, pipe);
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igt_pipe_crc_get_current(data->gfx_fd, data->pipe_crc, ¤t_crc);
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if (plane->type != DRM_PLANE_TYPE_CURSOR) {
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if (!igt_check_crc_equal(¤t_crc,
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&data->fullscreen_crc)) {
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igt_warn("crc mismatch. connector %s using pipe %s" \
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" plane index %d mode %.4s\n",
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igt_output_name(output),
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kmstest_pipe_name(pipe),
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plane->index,
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(char *)&mode);
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rVal++;
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}
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} else {
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if (!igt_check_crc_equal(¤t_crc,
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&data->cursor_crc)) {
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igt_warn("crc mismatch. connector %s using pipe %s" \
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" plane index %d mode %.4s\n",
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igt_output_name(output),
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kmstest_pipe_name(pipe),
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plane->index,
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(char *)&mode);
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rVal++;
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}
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}
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}
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remove_fb(data, output, plane);
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return rVal;
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}
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static void
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test_available_modes(data_t* data)
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{
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igt_output_t *output;
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igt_plane_t *plane;
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int modeindex;
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enum pipe pipe;
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int invalids = 0, i, lut_size;
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drmModePlane *modePlane;
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struct {
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uint16_t red;
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uint16_t green;
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uint16_t blue;
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uint16_t reserved;
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} *lut = NULL;
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for_each_pipe_with_valid_output(&data->display, pipe, output) {
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igt_output_set_pipe(output, pipe);
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igt_display_commit2(&data->display, data->commit);
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if (igt_pipe_obj_has_prop(&data->display.pipes[pipe], IGT_CRTC_GAMMA_LUT_SIZE)) {
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lut_size = igt_pipe_get_prop(&data->display, pipe,
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IGT_CRTC_GAMMA_LUT_SIZE);
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lut = calloc(sizeof(*lut), lut_size);
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for (i = 0; i < lut_size; i++) {
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lut[i].red = (i * 0xffff / (lut_size - 1)) & 0xfc00;
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lut[i].green = (i * 0xffff / (lut_size - 1)) & 0xfc00;
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lut[i].blue = (i * 0xffff / (lut_size - 1)) & 0xfc00;
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}
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igt_pipe_replace_prop_blob(&data->display, pipe,
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IGT_CRTC_GAMMA_LUT,
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lut, sizeof(*lut) * lut_size);
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igt_display_commit2(&data->display, data->commit);
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for (i = 0; i < lut_size; i++) {
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lut[i].red = i * 0xffff / (lut_size - 1);
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lut[i].green = i * 0xffff / (lut_size - 1);
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lut[i].blue = i * 0xffff / (lut_size - 1);
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}
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}
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data->pipe_crc = igt_pipe_crc_new(data->gfx_fd, pipe,
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INTEL_PIPE_CRC_SOURCE_AUTO);
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igt_pipe_crc_start(data->pipe_crc);
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/*
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* regenerate comparison crcs for each pipe just in case.
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*/
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generate_comparison_crc_list(data, output);
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for_each_plane_on_pipe(&data->display, pipe, plane) {
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modePlane = drmModeGetPlane(data->gfx_fd,
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plane->drm_plane->plane_id);
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if (plane->type == DRM_PLANE_TYPE_CURSOR)
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continue;
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for (modeindex = 0;
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modeindex < modePlane->count_formats;
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modeindex++) {
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data->format.dword = modePlane->formats[modeindex];
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invalids += test_one_mode(data, output,
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plane,
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modePlane->formats[modeindex],
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pipe);
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}
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drmModeFreePlane(modePlane);
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}
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igt_pipe_crc_stop(data->pipe_crc);
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igt_pipe_crc_free(data->pipe_crc);
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if (lut != NULL) {
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igt_pipe_replace_prop_blob(&data->display, pipe,
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IGT_CRTC_GAMMA_LUT,
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lut, sizeof(*lut) * lut_size);
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free(lut);
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lut = NULL;
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}
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igt_output_set_pipe(output, PIPE_NONE);
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igt_display_commit2(&data->display, data->commit);
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}
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igt_assert(invalids == 0);
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}
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igt_main
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{
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data_t data = {};
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igt_skip_on_simulation();
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igt_fixture {
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data.gfx_fd = drm_open_driver_master(DRIVER_INTEL);
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kmstest_set_vt_graphics_mode();
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igt_display_require(&data.display, data.gfx_fd);
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igt_require_pipe_crc(data.gfx_fd);
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}
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data.commit = data.display.is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY;
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igt_subtest("available_mode_test_crc") {
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test_available_modes(&data);
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}
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igt_fixture {
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kmstest_restore_vt_mode();
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igt_display_fini(&data.display);
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}
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}
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