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526 lines
14 KiB
526 lines
14 KiB
/******************************************************************************
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*
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* Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************/
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/**
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*******************************************************************************
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* @file
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* ihevc_defs.h
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*
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* @brief
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* Definitions used in the codec
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*
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* @author
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* Ittiam
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*
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*
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* @remarks
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* None
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*
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*******************************************************************************
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*/
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#ifndef _IHEVC_DEFS_H_
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#define _IHEVC_DEFS_H_
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/*****************************************************************************/
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/* Profile and Levels */
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/*****************************************************************************/
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enum
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{
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IHEVC_PROFILE_MAIN = 0,
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};
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enum
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{
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IHEVC_TIER_MAIN,
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IHEVC_TIER_HIGH,
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};
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/* Slice type enums - Do not change the values */
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enum
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{
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BSLICE = 0,
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PSLICE = 1,
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ISLICE = 2,
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};
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/** Enum for Level : Multiplication by 30 as per spec is implemented as multiplied by 10 and then by 3
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* User will give level multiplied by 10 in the API
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*/
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enum
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{
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IHEVC_LEVEL_10 = 10 * 3,
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IHEVC_LEVEL_20 = 20 * 3,
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IHEVC_LEVEL_21 = 21 * 3,
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IHEVC_LEVEL_30 = 30 * 3,
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IHEVC_LEVEL_31 = 31 * 3,
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IHEVC_LEVEL_40 = 40 * 3,
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IHEVC_LEVEL_41 = 41 * 3,
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IHEVC_LEVEL_50 = 50 * 3,
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IHEVC_LEVEL_51 = 51 * 3,
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IHEVC_LEVEL_52 = 52 * 3,
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IHEVC_LEVEL_60 = 60 * 3,
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IHEVC_LEVEL_61 = 61 * 3,
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IHEVC_LEVEL_62 = 62 * 3,
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};
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enum
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{
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NAL_TRAIL_N = 0,
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NAL_TRAIL_R,
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NAL_TSA_N,
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NAL_TSA_R,
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NAL_STSA_N,
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NAL_STSA_R,
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NAL_RADL_N,
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NAL_RADL_R,
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NAL_RASL_N,
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NAL_RASL_R,
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NAL_RSV_VCL_N10 = 10,
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NAL_RSV_VCL_N12 = 12,
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NAL_RSV_VCL_N14 = 14,
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NAL_RSV_VCL_R11 = 11,
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NAL_RSV_VCL_R13 = 13,
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NAL_RSV_VCL_R15 = 15,
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NAL_BLA_W_LP = 16,
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NAL_BLA_W_DLP,
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NAL_BLA_N_LP,
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NAL_IDR_W_LP,
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NAL_IDR_N_LP,
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NAL_CRA,
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NAL_RSV_RAP_VCL22 = 22,
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NAL_RSV_RAP_VCL23 = 23,
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NAL_RSV_VCL24 = 24,
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NAL_RSV_VCL31 = 31,
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NAL_VPS = 32,
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NAL_SPS,
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NAL_PPS,
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NAL_AUD,
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NAL_EOS,
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NAL_EOB,
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NAL_FD,
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NAL_PREFIX_SEI = 39,
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NAL_SUFFIX_SEI = 40,
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NAL_RSV_NVCL41 = 41,
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NAL_RSV_NVCL47 = 47 ,
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NAL_UNSPEC48 = 48 ,
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NAL_UNSPEC63 = 49,
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};
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enum
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{
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CHROMA_FMT_IDC_MONOCHROME = 0,
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CHROMA_FMT_IDC_YUV420 = 1,
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CHROMA_FMT_IDC_YUV422 = 2,
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CHROMA_FMT_IDC_YUV444 = 3,
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CHROMA_FMT_IDC_YUV444_PLANES = 4,
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};
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typedef enum
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{
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NULL_PLANE = -1,
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U_PLANE = 0,
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V_PLANE = 1
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} CHROMA_PLANE_ID_T;
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/* Pred Modes */
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/* Do not change enum values */
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enum
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{
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PRED_MODE_INTER = 0,
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PRED_MODE_INTRA = 1,
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PRED_MODE_SKIP = 2
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};
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/* Partition Modes */
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/* Do not change enum values */
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enum
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{
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PART_2Nx2N = 0,
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PART_2NxN = 1,
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PART_Nx2N = 2,
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PART_NxN = 3,
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PART_2NxnU = 4,
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PART_2NxnD = 5,
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PART_nLx2N = 6,
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PART_nRx2N = 7
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};
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/* Prediction list */
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/* Do not change enum values */
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enum
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{
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PRED_L0 = 0,
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PRED_L1 = 1,
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PRED_BI = 2
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};
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/**
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* Scan types
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*/
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enum
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{
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SCAN_DIAG_UPRIGHT,
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SCAN_HORZ,
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SCAN_VERT
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};
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/**
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* VUI aspect ratio indicator
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*/
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enum
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{
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SAR_UNUSED = 0,
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SAR_1_1 = 1,
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SAR_12_11,
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SAR_10_11,
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SAR_16_11,
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SAR_40_33,
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SAR_24_11,
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SAR_20_11,
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SAR_32_11,
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SAR_80_33,
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SAR_18_11,
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SAR_15_11,
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SAR_64_33,
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SAR_160_99,
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SAR_4_3,
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SAR_3_2,
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SAR_2_1,
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EXTENDED_SAR = 255
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};
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enum
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{
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VID_FMT_COMPONENT = 0,
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VID_FMT_PAL,
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VID_FMT_NTSC,
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VID_FMT_SECAM,
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VID_FMT_MAC,
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VID_FMT_UNSPECIFIED
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};
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typedef enum {
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USER_DATA_BAR_DATA = 0,
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USER_DATA_CC_DATA = 1,
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USER_DATA_AFD_DATA = 2,
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// do not add anything below
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USER_DATA_MAX
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} USER_DATA_SEI_TYPE_T;
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/**
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****************************************************************************
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* SEI payload type
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****************************************************************************
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*/
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enum
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{
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SEI_BUFFERING_PERIOD = 0,
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SEI_PICTURE_TIMING = 1,
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SEI_PAN_SCAN_RECT = 2,
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SEI_FILLER_PAYLOAD = 3,
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SEI_USER_DATA_REGISTERED_ITU_T_T35 = 4,
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SEI_USER_DATA_UNREGISTERED = 5,
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SEI_RECOVERY_POINT = 6,
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SEI_SCENE_INFO = 9,
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SEI_FULL_FRAME_SNAPSHOT = 15,
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SEI_PROGRESSIVE_REFINEMENT_SEGMENT_START = 16,
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SEI_PROGRESSIVE_REFINEMENT_SEGMENT_END = 17,
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SEI_FILM_GRAIN_CHARACTERISTICS = 19,
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SEI_POST_FILTER_HINT = 22,
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SEI_TONE_MAPPING_INFO = 23,
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SEI_FRAME_PACKING = 45,
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SEI_DISPLAY_ORIENTATION = 47,
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SEI_SOP_DESCRIPTION = 128,
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SEI_ACTIVE_PARAMETER_SETS = 129,
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SEI_DECODING_UNIT_INFO = 130,
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SEI_TEMPORAL_LEVEL0_INDEX = 131,
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SEI_DECODED_PICTURE_HASH = 132,
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SEI_SCALABLE_NESTING = 133,
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SEI_REGION_REFRESH_INFO = 134,
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SEI_NO_DISPLAY = 135,
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SEI_TIME_CODE = 136,
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SEI_MASTERING_DISPLAY_COLOUR_VOLUME = 137,
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SEI_SEGM_RECT_FRAME_PACKING = 138,
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SEI_TEMP_MOTION_CONSTRAINED_TILE_SETS = 139,
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SEI_CHROMA_SAMPLING_FILTER_HINT = 140,
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SEI_KNEE_FUNCTION_INFO = 141
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};
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#define BIT_DEPTH 8
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#define BIT_DEPTH_LUMA BIT_DEPTH
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#define BIT_DEPTH_CHROMA BIT_DEPTH
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/*****************************************************************************/
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/* Profile tier level defs */
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/*****************************************************************************/
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#define MAX_PROFILE_COMPATBLTY 32
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/*****************************************************************************/
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/* Reference frame defs */
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/*****************************************************************************/
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/* Maximum DPB size */
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#define MAX_DPB_SIZE 16
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/*****************************************************************************/
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/* VPS restrictions */
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/*****************************************************************************/
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/* Number of VPS allowed in Main Profile */
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#define MAX_VPS_CNT 16
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/* Max sub layers in VPS */
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#define VPS_MAX_SUB_LAYERS 7
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/* Max number of HRD parameters */
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#define VPS_MAX_HRD_PARAMS 2
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/* Maximum number of operation point layers */
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#define VPS_MAX_OP_LAYERS 2
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/*****************************************************************************/
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/* Tile restrictions */
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/*****************************************************************************/
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/* Minimum tile width in Main Profile */
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#define MIN_TILE_WD MAX_CTB_SIZE
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/* Minimum tile height in Main Profile */
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#define MIN_TILE_HT MAX_CTB_SIZE
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/*****************************************************************************/
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/* SPS restrictions */
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/*****************************************************************************/
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/* Number of SPS allowed in Main Profile*/
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/* An extra buffer is allocated to write the parsed data
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* It is copied to the appropriate location later */
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#define MAX_SPS_CNT (16 + 1)
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/* Max sub layers in PPS */
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#define SPS_MAX_SUB_LAYERS 7
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/* Maximum long term reference pics */
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#define MAX_LTREF_PICS_SPS 32
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#define MAX_STREF_PICS_SPS 64
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/*****************************************************************************/
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/* PPS restrictions */
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/*****************************************************************************/
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/* Number of PPS allowed in Main Profile */
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/* An extra buffer is allocated to write the parsed data
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* It is copied to the appropriate location later */
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#define MAX_PPS_CNT (64 + 1)
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/*****************************************************************************/
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/* Macro definitions for sizes of CTB, PU, TU, CU */
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/*****************************************************************************/
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/* CTB Size Range */
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#define MAX_CTB_SIZE 64
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#define MIN_CTB_SIZE 16
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#define LOG2_MAX_CTB_SIZE 6
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#define LOG2_MIN_CTB_SIZE 4
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/* TU Size Range */
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#define MAX_TU_SIZE 32
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#define MIN_TU_SIZE 4
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#define LOG2_MAX_TU_SIZE 5
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#define LOG2_MIN_TU_SIZE 2
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/* Max Transform Size */
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#define MAX_TRANS_SIZE (MAX_TU_SIZE*MAX_TU_SIZE)
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/* PU Size Range */
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#define MAX_PU_SIZE 64
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#define MIN_PU_SIZE 4
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#define LOG2_MAX_PU_SIZE 6
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#define LOG2_MIN_PU_SIZE 2
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/* CU Size Range */
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#define MAX_CU_SIZE 64
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#define MIN_CU_SIZE 8
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#define LOG2_MAX_CU_SIZE 6
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#define LOG2_MIN_CU_SIZE 3
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/* Number of max TU in a CTB row */
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#define MAX_TU_IN_CTB_ROW ((MAX_CTB_SIZE / MIN_TU_SIZE))
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/* Number of max TU in a CTB row */
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#define MAX_CU_IN_CTB_ROW ((MAX_CTB_SIZE / MIN_CU_SIZE))
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/* Number of max PU in a CTb row */
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#define MAX_PU_IN_CTB_ROW ((MAX_CTB_SIZE / MIN_PU_SIZE))
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/* Number of max CU in a CTB */
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#define MAX_CU_IN_CTB ((MAX_CTB_SIZE / MIN_CU_SIZE) * \
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(MAX_CTB_SIZE / MIN_CU_SIZE))
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/* Number of max PU in a CTB */
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/*****************************************************************************/
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/* Note though for 64 x 64 CTB, Max PU in CTB is 128, in order to store */
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/* intra pred info, 256 entries are needed */
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/*****************************************************************************/
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#define MAX_PU_IN_CTB ((MAX_CTB_SIZE / MIN_PU_SIZE) * \
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(MAX_CTB_SIZE / MIN_PU_SIZE))
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/* Number of max TU in a CTB */
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#define MAX_TU_IN_CTB ((MAX_CTB_SIZE / MIN_TU_SIZE) * \
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(MAX_CTB_SIZE / MIN_TU_SIZE))
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/**
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* Maximum transform depths
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*/
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#define MAX_TRAFO_DEPTH 5
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/* Max number of deblocking edges */
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#define MAX_VERT_DEBLK_EDGES ((MAX_CTB_SIZE/8) * (MAX_CTB_SIZE/4))
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#define MAX_HORZ_DEBLK_EDGES ((MAX_CTB_SIZE/4) * (MAX_CTB_SIZE/8))
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/* Qp can not change below 8x8 level */
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#define MAX_DEBLK_QP_CNT ((MAX_CTB_SIZE/8) * (MAX_CTB_SIZE/8))
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/*****************************************************************************/
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/* Parsing related macros */
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/*****************************************************************************/
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#define SUBBLK_COEFF_CNT 16
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/* Quant and Trans defs */
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/*****************************************************************************/
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/* Sizes for Transform functions */
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/*****************************************************************************/
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#define TRANS_SIZE_4 4
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#define TRANS_SIZE_8 8
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#define TRANS_SIZE_16 16
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#define TRANS_SIZE_32 32
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#define IT_SHIFT_STAGE_1 7
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#define IT_SHIFT_STAGE_2 12
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/**
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* @brief Maximum transform dynamic range (excluding sign bit)
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*/
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#define MAX_TR_DYNAMIC_RANGE 15
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/**
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* @brief Q(QP%6) * IQ(QP%6) = 2^20
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*/
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#define QUANT_IQUANT_SHIFT 20
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/**
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* @brief Q factor for Qp%6 multiplication
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*/
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#define QUANT_SHIFT 14
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/**
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* @brief Q shift factor for flat rescale matrix weights
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*/
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#define FLAT_RESCALE_MAT_Q_SHIFT 11
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/**
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* @brief Scaling matrix is represented in Q15 format
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*/
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#define SCALING_Q_SHIFT 15
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/**
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* @brief rounding factor for quantization represented in Q9 format
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*/
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#define QUANT_ROUND_FACTOR_Q 9
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/**
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* @brief Minimum qp supported in HEVC spec
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*/
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#define MIN_HEVC_QP 0
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/**
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* @brief Maximum qp supported in HEVC spec
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*/
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#define MAX_HEVC_QP 51 //FOR MAIN Branch Encoder
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#define MAX_HEVC_QP_10bit 63 //FOR HBD Branch Encoder
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#define MAX_HEVC_QP_12bit 75 //FOR HBD Branch Encoder
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/**
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* @brief Total number of transform sizes
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* used for sizeID while getting scale matrix
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*/
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#define NUM_UNIQUE_TRANS_SIZE 4
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/*****************************************************************************/
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/* Number of scaling matrices for each transform size */
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/*****************************************************************************/
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#define SCALE_MAT_CNT_TRANS_SIZE_4 6
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#define SCALE_MAT_CNT_TRANS_SIZE_8 6
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#define SCALE_MAT_CNT_TRANS_SIZE_16 6
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#define SCALE_MAT_CNT_TRANS_SIZE_32 2
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/* Maximum number of scale matrices for a given transform size */
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#define SCALE_MAT_CNT_MAX_PER_TRANS_SIZE 6
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/* Total number of scale matrices */
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#define TOTAL_SCALE_MAT_COUNT (SCALE_MAT_CNT_TRANS_SIZE_4 + \
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SCALE_MAT_CNT_TRANS_SIZE_8 + \
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SCALE_MAT_CNT_TRANS_SIZE_16 + \
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SCALE_MAT_CNT_TRANS_SIZE_32)
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/*****************************************************************************/
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/* Intra pred Macros */
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/*****************************************************************************/
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/** Planar Intra prediction mode */
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#define INTRA_PLANAR 0
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/** DC Intra prediction mode */
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#define INTRA_DC 1
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/** Gives angular mode for intra prediction */
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#define INTRA_ANGULAR(x) (x)
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/** Following is used to signal no intra prediction in case of pcm blocks
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*/
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#define INTRA_PRED_NONE 63
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/** Following is used to signal no intra prediction is needed for first three
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* 4x4 luma blocks in case of 4x4 TU sizes
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* Also used in pcm cases
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*/
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#define INTRA_PRED_CHROMA_IDX_NONE 7
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#define MAX_NUM_CLOCK_TS 3
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#define MAX_USERDATA_PAYLOAD 256
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#define MAX_CPB_CNT 32
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#endif /*__IHEVC_DEFS_H_*/
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