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43 lines
1.8 KiB
43 lines
1.8 KiB
// REQUIRES: x86-registered-target
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// REQUIRES: nvptx-registered-target
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// RUN: %clang_cc1 -std=c++11 -fcuda-is-device -triple nvptx64-nvidia-cuda -emit-llvm -o - %s | FileCheck --check-prefix=DEVICE %s
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// RUN: echo "GPU binary would be here" > %t
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// RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-linux-gnu -target-sdk-version=8.0 -fcuda-include-gpubinary %t -emit-llvm -o - %s | FileCheck --check-prefix=HOST %s
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struct surfaceReference {
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int desc;
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};
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template <typename T, int dim = 1>
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struct __attribute__((device_builtin_surface_type)) surface : public surfaceReference {
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};
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// Partial specialization over `void`.
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template<int dim>
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struct __attribute__((device_builtin_surface_type)) surface<void, dim> : public surfaceReference {
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};
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// On the device side, surface references are represented as `i64` handles.
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// DEVICE: @surf = addrspace(1) global i64 undef, align 4
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// On the host side, they remain in the original type.
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// HOST: @surf = internal global %struct.surface
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// HOST: @0 = private unnamed_addr constant [5 x i8] c"surf\00"
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surface<void, 2> surf;
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__attribute__((device)) int suld_2d_zero(surface<void, 2>, int, int) asm("llvm.nvvm.suld.2d.i32.zero");
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// DEVICE-LABEL: i32 @_Z3fooii(i32 %x, i32 %y)
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// DEVICE: call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @surf)
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// DEVICE: call i32 @llvm.nvvm.suld.2d.i32.zero(i64 %{{.*}}, i32 %{{.*}}, i32 %{{.*}})
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__attribute__((device)) int foo(int x, int y) {
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return suld_2d_zero(surf, x, y);
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}
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// HOST: define internal void @[[PREFIX:__cuda]]_register_globals
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// Texture references need registering with correct arguments.
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// HOST: call void @[[PREFIX]]RegisterSurface(i8** %0, i8*{{.*}}({{.*}}@surf{{.*}}), i8*{{.*}}({{.*}}@0{{.*}}), i8*{{.*}}({{.*}}@0{{.*}}), i32 2, i32 0)
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// They also need annotating in metadata.
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// DEVICE: !0 = !{i64 addrspace(1)* @surf, !"surface", i32 1}
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