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569 lines
18 KiB
569 lines
18 KiB
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -ffixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -ffixed-point -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED
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_Accum a;
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_Fract f;
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long _Fract lf;
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unsigned _Accum ua;
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short unsigned _Accum usa;
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unsigned _Fract uf;
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_Sat _Accum sa;
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_Sat _Fract sf;
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_Sat long _Fract slf;
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_Sat unsigned _Accum sua;
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_Sat short unsigned _Accum susa;
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_Sat unsigned _Fract suf;
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int i;
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// CHECK-LABEL: @inc_a(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
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// CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], -32768
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// CHECK-NEXT: store i32 [[TMP1]], i32* @a, align 4
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// CHECK-NEXT: ret void
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//
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void inc_a() {
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a++;
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}
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// CHECK-LABEL: @inc_f(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @f, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], -32768
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// CHECK-NEXT: store i16 [[TMP1]], i16* @f, align 2
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// CHECK-NEXT: ret void
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//
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void inc_f() {
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f++;
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}
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// CHECK-LABEL: @inc_lf(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4
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// CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], -2147483648
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// CHECK-NEXT: store i32 [[TMP1]], i32* @lf, align 4
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// CHECK-NEXT: ret void
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//
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void inc_lf() {
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lf++;
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}
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// SIGNED-LABEL: @inc_ua(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4
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// SIGNED-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 65536
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// SIGNED-NEXT: store i32 [[TMP1]], i32* @ua, align 4
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @inc_ua(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4
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// UNSIGNED-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 32768
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// UNSIGNED-NEXT: store i32 [[TMP1]], i32* @ua, align 4
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// UNSIGNED-NEXT: ret void
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//
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void inc_ua() {
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ua++;
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}
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// SIGNED-LABEL: @inc_usa(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], 256
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// SIGNED-NEXT: store i16 [[TMP1]], i16* @usa, align 2
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @inc_usa(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], 128
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// UNSIGNED-NEXT: store i16 [[TMP1]], i16* @usa, align 2
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// UNSIGNED-NEXT: ret void
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//
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void inc_usa() {
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usa++;
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}
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// SIGNED-LABEL: @inc_uf(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], poison
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// SIGNED-NEXT: store i16 [[TMP1]], i16* @uf, align 2
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @inc_uf(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], -32768
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// UNSIGNED-NEXT: store i16 [[TMP1]], i16* @uf, align 2
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// UNSIGNED-NEXT: ret void
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//
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void inc_uf() {
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uf++;
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}
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// CHECK-LABEL: @inc_sa(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4
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// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 -32768)
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// CHECK-NEXT: store i32 [[TMP1]], i32* @sa, align 4
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// CHECK-NEXT: ret void
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//
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void inc_sa() {
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sa++;
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}
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// CHECK-LABEL: @inc_sf(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sf, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 -32768)
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// CHECK-NEXT: store i16 [[TMP1]], i16* @sf, align 2
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// CHECK-NEXT: ret void
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//
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void inc_sf() {
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sf++;
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}
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// CHECK-LABEL: @inc_slf(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @slf, align 4
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// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 -2147483648)
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// CHECK-NEXT: store i32 [[TMP1]], i32* @slf, align 4
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// CHECK-NEXT: ret void
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//
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void inc_slf() {
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slf++;
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}
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// SIGNED-LABEL: @inc_sua(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @sua, align 4
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// SIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[TMP0]], i32 65536)
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// SIGNED-NEXT: store i32 [[TMP1]], i32* @sua, align 4
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @inc_sua(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @sua, align 4
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// UNSIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 32768)
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// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP1]] to i31
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// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i31 [[RESIZE]] to i32
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// UNSIGNED-NEXT: store i32 [[RESIZE1]], i32* @sua, align 4
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// UNSIGNED-NEXT: ret void
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//
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void inc_sua() {
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sua++;
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}
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// SIGNED-LABEL: @inc_susa(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 256)
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// SIGNED-NEXT: store i16 [[TMP1]], i16* @susa, align 2
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @inc_susa(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 128)
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// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP1]] to i15
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// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
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// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @susa, align 2
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// UNSIGNED-NEXT: ret void
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//
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void inc_susa() {
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susa++;
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}
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// SIGNED-LABEL: @inc_suf(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 -1)
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// SIGNED-NEXT: store i16 [[TMP1]], i16* @suf, align 2
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @inc_suf(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 32767)
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// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP1]] to i15
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// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
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// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @suf, align 2
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// UNSIGNED-NEXT: ret void
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//
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void inc_suf() {
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suf++;
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}
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// CHECK-LABEL: @dec_a(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
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// CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], -32768
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// CHECK-NEXT: store i32 [[TMP1]], i32* @a, align 4
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// CHECK-NEXT: ret void
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//
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void dec_a() {
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a--;
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}
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// CHECK-LABEL: @dec_f(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @f, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], -32768
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// CHECK-NEXT: store i16 [[TMP1]], i16* @f, align 2
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// CHECK-NEXT: ret void
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//
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void dec_f() {
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f--;
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}
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// CHECK-LABEL: @dec_lf(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4
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// CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], -2147483648
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// CHECK-NEXT: store i32 [[TMP1]], i32* @lf, align 4
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// CHECK-NEXT: ret void
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//
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void dec_lf() {
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lf--;
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}
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// SIGNED-LABEL: @dec_ua(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4
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// SIGNED-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], 65536
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// SIGNED-NEXT: store i32 [[TMP1]], i32* @ua, align 4
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @dec_ua(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4
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// UNSIGNED-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], 32768
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// UNSIGNED-NEXT: store i32 [[TMP1]], i32* @ua, align 4
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// UNSIGNED-NEXT: ret void
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//
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void dec_ua() {
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ua--;
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}
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// SIGNED-LABEL: @dec_usa(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], 256
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// SIGNED-NEXT: store i16 [[TMP1]], i16* @usa, align 2
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @dec_usa(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], 128
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// UNSIGNED-NEXT: store i16 [[TMP1]], i16* @usa, align 2
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// UNSIGNED-NEXT: ret void
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//
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void dec_usa() {
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usa--;
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}
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// SIGNED-LABEL: @dec_uf(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], poison
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// SIGNED-NEXT: store i16 [[TMP1]], i16* @uf, align 2
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @dec_uf(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], -32768
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// UNSIGNED-NEXT: store i16 [[TMP1]], i16* @uf, align 2
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// UNSIGNED-NEXT: ret void
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//
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void dec_uf() {
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uf--;
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}
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// CHECK-LABEL: @dec_sa(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4
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// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 -32768)
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// CHECK-NEXT: store i32 [[TMP1]], i32* @sa, align 4
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// CHECK-NEXT: ret void
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//
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void dec_sa() {
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sa--;
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}
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// CHECK-LABEL: @dec_sf(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sf, align 2
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// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 -32768)
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// CHECK-NEXT: store i16 [[TMP1]], i16* @sf, align 2
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// CHECK-NEXT: ret void
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//
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void dec_sf() {
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sf--;
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}
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// CHECK-LABEL: @dec_slf(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @slf, align 4
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// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 -2147483648)
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// CHECK-NEXT: store i32 [[TMP1]], i32* @slf, align 4
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// CHECK-NEXT: ret void
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//
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void dec_slf() {
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slf--;
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}
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// SIGNED-LABEL: @dec_sua(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @sua, align 4
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// SIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[TMP0]], i32 65536)
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// SIGNED-NEXT: store i32 [[TMP1]], i32* @sua, align 4
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @dec_sua(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @sua, align 4
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// UNSIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 32768)
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// UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
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// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 0, i32 [[TMP1]]
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// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i31
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// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i31 [[RESIZE]] to i32
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// UNSIGNED-NEXT: store i32 [[RESIZE1]], i32* @sua, align 4
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// UNSIGNED-NEXT: ret void
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//
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void dec_sua() {
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sua--;
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}
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// SIGNED-LABEL: @dec_susa(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 256)
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// SIGNED-NEXT: store i16 [[TMP1]], i16* @susa, align 2
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @dec_susa(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 128)
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// UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
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// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
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// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
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// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
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// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @susa, align 2
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// UNSIGNED-NEXT: ret void
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//
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void dec_susa() {
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susa--;
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}
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// SIGNED-LABEL: @dec_suf(
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// SIGNED-NEXT: entry:
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// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2
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// SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 -1)
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// SIGNED-NEXT: store i16 [[TMP1]], i16* @suf, align 2
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// SIGNED-NEXT: ret void
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//
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// UNSIGNED-LABEL: @dec_suf(
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// UNSIGNED-NEXT: entry:
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// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2
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// UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 32767)
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// UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
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// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
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// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
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// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
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// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @suf, align 2
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// UNSIGNED-NEXT: ret void
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//
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void dec_suf() {
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suf--;
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}
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// CHECK-LABEL: @neg_a(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
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// CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[TMP0]]
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// CHECK-NEXT: store i32 [[TMP1]], i32* @a, align 4
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// CHECK-NEXT: ret void
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//
|
|
void neg_a() {
|
|
a = -a;
|
|
}
|
|
|
|
// CHECK-LABEL: @neg_f(
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @f, align 2
|
|
// CHECK-NEXT: [[TMP1:%.*]] = sub i16 0, [[TMP0]]
|
|
// CHECK-NEXT: store i16 [[TMP1]], i16* @f, align 2
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
void neg_f() {
|
|
f = -f;
|
|
}
|
|
|
|
// CHECK-LABEL: @neg_usa(
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2
|
|
// CHECK-NEXT: [[TMP1:%.*]] = sub i16 0, [[TMP0]]
|
|
// CHECK-NEXT: store i16 [[TMP1]], i16* @usa, align 2
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
void neg_usa() {
|
|
usa = -usa;
|
|
}
|
|
|
|
// CHECK-LABEL: @neg_uf(
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2
|
|
// CHECK-NEXT: [[TMP1:%.*]] = sub i16 0, [[TMP0]]
|
|
// CHECK-NEXT: store i16 [[TMP1]], i16* @uf, align 2
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
void neg_uf() {
|
|
uf = -uf;
|
|
}
|
|
|
|
// CHECK-LABEL: @neg_sa(
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4
|
|
// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 0, i32 [[TMP0]])
|
|
// CHECK-NEXT: store i32 [[TMP1]], i32* @sa, align 4
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
void neg_sa() {
|
|
sa = -sa;
|
|
}
|
|
|
|
// CHECK-LABEL: @neg_sf(
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sf, align 2
|
|
// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])
|
|
// CHECK-NEXT: store i16 [[TMP1]], i16* @sf, align 2
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
void neg_sf() {
|
|
sf = -sf;
|
|
}
|
|
|
|
// SIGNED-LABEL: @neg_susa(
|
|
// SIGNED-NEXT: entry:
|
|
// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2
|
|
// SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 0, i16 [[TMP0]])
|
|
// SIGNED-NEXT: store i16 [[TMP1]], i16* @susa, align 2
|
|
// SIGNED-NEXT: ret void
|
|
//
|
|
// UNSIGNED-LABEL: @neg_susa(
|
|
// UNSIGNED-NEXT: entry:
|
|
// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2
|
|
// UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])
|
|
// UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
|
|
// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
|
|
// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
|
|
// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
|
|
// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @susa, align 2
|
|
// UNSIGNED-NEXT: ret void
|
|
//
|
|
void neg_susa() {
|
|
susa = -susa;
|
|
}
|
|
|
|
// SIGNED-LABEL: @neg_suf(
|
|
// SIGNED-NEXT: entry:
|
|
// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2
|
|
// SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 0, i16 [[TMP0]])
|
|
// SIGNED-NEXT: store i16 [[TMP1]], i16* @suf, align 2
|
|
// SIGNED-NEXT: ret void
|
|
//
|
|
// UNSIGNED-LABEL: @neg_suf(
|
|
// UNSIGNED-NEXT: entry:
|
|
// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2
|
|
// UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]])
|
|
// UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0
|
|
// UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]]
|
|
// UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15
|
|
// UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16
|
|
// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @suf, align 2
|
|
// UNSIGNED-NEXT: ret void
|
|
//
|
|
void neg_suf() {
|
|
suf = -suf;
|
|
}
|
|
|
|
|
|
// CHECK-LABEL: @plus_a(
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
|
|
// CHECK-NEXT: store i32 [[TMP0]], i32* @a, align 4
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
void plus_a() {
|
|
a = +a;
|
|
}
|
|
|
|
// CHECK-LABEL: @plus_uf(
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2
|
|
// CHECK-NEXT: store i16 [[TMP0]], i16* @uf, align 2
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
void plus_uf() {
|
|
uf = +uf;
|
|
}
|
|
|
|
// CHECK-LABEL: @plus_sa(
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4
|
|
// CHECK-NEXT: store i32 [[TMP0]], i32* @sa, align 4
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
void plus_sa() {
|
|
sa = +sa;
|
|
}
|
|
|
|
|
|
// CHECK-LABEL: @not_a(
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4
|
|
// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
|
|
// CHECK-NEXT: [[LNOT:%.*]] = xor i1 [[TOBOOL]], true
|
|
// CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32
|
|
// CHECK-NEXT: store i32 [[LNOT_EXT]], i32* @i, align 4
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
void not_a() {
|
|
i = !a;
|
|
}
|
|
|
|
// CHECK-LABEL: @not_uf(
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2
|
|
// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i16 [[TMP0]], 0
|
|
// CHECK-NEXT: [[LNOT:%.*]] = xor i1 [[TOBOOL]], true
|
|
// CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32
|
|
// CHECK-NEXT: store i32 [[LNOT_EXT]], i32* @i, align 4
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
void not_uf() {
|
|
i = !uf;
|
|
}
|
|
|
|
// CHECK-LABEL: @not_susa(
|
|
// CHECK-NEXT: entry:
|
|
// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2
|
|
// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i16 [[TMP0]], 0
|
|
// CHECK-NEXT: [[LNOT:%.*]] = xor i1 [[TOBOOL]], true
|
|
// CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32
|
|
// CHECK-NEXT: store i32 [[LNOT_EXT]], i32* @i, align 4
|
|
// CHECK-NEXT: ret void
|
|
//
|
|
void not_susa() {
|
|
i = !susa;
|
|
}
|