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386 lines
17 KiB
386 lines
17 KiB
// RUN: mlir-opt -allow-unregistered-dialect %s -split-input-file -affine-pipeline-data-transfer | FileCheck %s
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// -----
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// CHECK-DAG: [[$MOD_2:#map[0-9]+]] = affine_map<(d0) -> (d0 mod 2)>
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// CHECK-DAG: [[$MAP_MINUS_1:#map[0-9]+]] = affine_map<(d0) -> (d0 - 1)>
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// CHECK-LABEL: func @loop_nest_dma() {
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func @loop_nest_dma() {
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%A = alloc() : memref<256 x f32, affine_map<(d0) -> (d0)>, 0>
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%Ah = alloc() : memref<32 x f32, affine_map<(d0) -> (d0)>, 1>
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%tag = alloc() : memref<1 x f32>
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%zero = constant 0 : index
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%num_elts = constant 32 : index
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affine.for %i = 0 to 8 {
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affine.dma_start %A[%i], %Ah[%i], %tag[%zero], %num_elts : memref<256 x f32>, memref<32 x f32, 1>, memref<1 x f32>
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affine.dma_wait %tag[%zero], %num_elts : memref<1 x f32>
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%v = affine.load %Ah[%i] : memref<32 x f32, affine_map<(d0) -> (d0)>, 1>
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%r = "compute"(%v) : (f32) -> (f32)
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affine.store %r, %Ah[%i] : memref<32 x f32, affine_map<(d0) -> (d0)>, 1>
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affine.for %j = 0 to 32 {
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"do_more_compute"(%i, %j) : (index, index) -> ()
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}
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}
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dealloc %tag : memref<1 x f32>
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dealloc %Ah : memref<32 x f32, affine_map<(d0) -> (d0)>, 1>
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return
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}
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// CHECK: %{{.*}} = alloc() : memref<256xf32>
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// CHECK: %{{.*}} = alloc() : memref<2x32xf32, 1>
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// CHECK-NEXT: %{{.*}} = alloc() : memref<2x1xf32>
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// CHECK-NEXT: affine.dma_start %{{.*}}[%{{.*}}], %{{.*}}[%{{.*}} mod 2, %{{.*}}], %{{.*}}[%{{.*}} mod 2, 0], %{{.*}} : memref<256xf32>, memref<2x32xf32, 1>, memref<2x1xf32>
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// CHECK-NEXT: affine.for %{{.*}} = 1 to 8 {
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// CHECK-NEXT: affine.dma_start %{{.*}}[%{{.*}}], %{{.*}}[%{{.*}} mod 2, %{{.*}}], %{{.*}}[%{{.*}} mod 2, 0], %{{.*}} : memref<256xf32>, memref<2x32xf32, 1>, memref<2x1xf32>
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// CHECK-NEXT: affine.apply [[$MAP_MINUS_1]](%{{.*}})
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// CHECK-NEXT: affine.apply [[$MOD_2]](%{{.*}})
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// CHECK-NEXT: affine.apply [[$MOD_2]](%{{.*}})
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// CHECK-NEXT: affine.dma_wait %{{.*}}[%{{.*}} mod 2, 0], %{{.*}} : memref<2x1xf32>
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// CHECK-NEXT: affine.load %{{.*}}[%{{.*}} mod 2, %{{.*}}] : memref<2x32xf32, 1>
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// CHECK-NEXT: "compute"(%{{.*}}) : (f32) -> f32
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// CHECK-NEXT: affine.store %{{.*}}, %{{.*}}[%{{.*}} mod 2, %{{.*}}] : memref<2x32xf32, 1>
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// CHECK-NEXT: affine.for %{{.*}} = 0 to 32 {
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// CHECK-NEXT: "do_more_compute"(%{{.*}}, %{{.*}}) : (index, index) -> ()
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// CHECK-NEXT: }
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// CHECK-NEXT: }
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// CHECK-NEXT: affine.apply [[$MAP_MINUS_1]](%{{.*}})
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// CHECK-NEXT: affine.apply [[$MOD_2]](%{{.*}})
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// CHECK-NEXT: affine.apply [[$MOD_2]](%{{.*}})
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// CHECK-NEXT: affine.dma_wait %{{.*}}[%{{.*}} mod 2, 0], %{{.*}} : memref<2x1xf32>
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// CHECK-NEXT: affine.load %{{.*}}[%{{.*}} mod 2, %{{.*}}] : memref<2x32xf32, 1>
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// CHECK-NEXT: "compute"(%{{.*}}) : (f32) -> f32
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// CHECK-NEXT: affine.store %{{.*}}, %{{.*}}[%{{.*}} mod 2, %{{.*}}] : memref<2x32xf32, 1>
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// CHECK-NEXT: affine.for %{{.*}} = 0 to 32 {
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// CHECK-NEXT: "do_more_compute"(%{{.*}}, %{{.*}}) : (index, index) -> ()
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// CHECK-NEXT: }
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// CHECK-NEXT: dealloc %{{.*}} : memref<2x1xf32>
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// CHECK-NEXT: dealloc %{{.*}} : memref<2x32xf32, 1>
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// CHECK-NEXT: return
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// CHECK-NEXT:}
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// -----
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// CHECK-DAG: [[$FLOOR_MOD_2:#map[0-9]+]] = affine_map<(d0) -> ((d0 floordiv 4) mod 2)>
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// CHECK-DAG: [[$REMAP_SHIFT_MINUS_4:#map[0-9]+]] = affine_map<(d0) -> (d0 - 4)>
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// CHECK-LABEL: @loop_step
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func @loop_step(%arg0: memref<512xf32>,
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%arg1: memref<512xf32>) {
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%c0 = constant 0 : index
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%c4 = constant 4 : index
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affine.for %i0 = 0 to 512 step 4 {
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%1 = alloc() : memref<4xf32, 1>
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%2 = alloc() : memref<1xi32>
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affine.dma_start %arg0[%i0], %1[%c0], %2[%c0], %c4,
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: memref<512xf32>, memref<4xf32, 1>, memref<1xi32>
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affine.dma_wait %2[%c0], %c4 : memref<1xi32>
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"compute"(%i0) : (index) -> ()
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dealloc %2 : memref<1xi32>
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dealloc %1 : memref<4xf32, 1>
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}
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return
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}
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// CHECK: [[BUF:%[0-9]+]] = alloc() : memref<2x4xf32, 1>
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// CHECK: [[TAG:%[0-9]+]] = alloc() : memref<2x1xi32>
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// CHECK-NEXT: affine.dma_start %{{.*}}[%{{.*}}], %{{.*}}[(%{{.*}} floordiv 4) mod 2, 0], [[TAG]][(%{{.*}} floordiv 4) mod 2, 0], %{{.*}} : memref<512xf32>, memref<2x4xf32, 1>, memref<2x1xi32>
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// CHECK-NEXT: affine.for %{{.*}} = 4 to 512 step 4 {
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// CHECK-NEXT: affine.dma_start %{{.*}}[%{{.*}}], %{{.*}}[(%{{.*}} floordiv 4) mod 2, 0], [[TAG]][(%{{.*}} floordiv 4) mod 2, 0], %{{.*}} : memref<512xf32>, memref<2x4xf32, 1>, memref<2x1xi32>
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// CHECK-NEXT: affine.apply [[$REMAP_SHIFT_MINUS_4]](%{{.*}})
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// CHECK-NEXT: affine.apply [[$FLOOR_MOD_2]](%{{.*}})
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// CHECK: affine.dma_wait [[TAG]][(%{{.*}} floordiv 4) mod 2, 0], %{{.*}} : memref<2x1xi32>
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// CHECK-NEXT: "compute"(%{{.*}}) : (index) -> ()
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// CHECK-NEXT: }
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// CHECK-NEXT: [[SHIFTED:%[0-9]+]] = affine.apply [[$REMAP_SHIFT_MINUS_4]](%{{.*}})
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// CHECK-NEXT: %{{.*}} = affine.apply [[$FLOOR_MOD_2]]([[SHIFTED]])
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// CHECK: affine.dma_wait [[TAG]][(%{{.*}} floordiv 4) mod 2, 0], %{{.*}} : memref<2x1xi32>
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// CHECK-NEXT: "compute"(%{{.*}}) : (index) -> ()
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// CHECK-NEXT: dealloc [[TAG]] : memref<2x1xi32>
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// CHECK-NEXT: dealloc [[BUF]] : memref<2x4xf32, 1>
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// CHECK-NEXT: return
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// CHECK-NEXT: }
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// -----
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#map1 = affine_map<(d0, d1) -> ((d0 * 2048 + d1 * 256) floordiv 32)>
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#map2 = affine_map<(d0) -> ((d0 * 2048) floordiv 32)>
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// CHECK-LABEL: func @loop_dma_nested(%{{.*}}: memref<512x32xvector<8xf32>
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func @loop_dma_nested(%arg0: memref<512x32xvector<8xf32>>, %arg1: memref<512x32xvector<8xf32>>, %arg2: memref<512x32xvector<8xf32>>) {
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%num_elts = constant 256 : index
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%c0 = constant 0 : index
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%0 = alloc() : memref<64x4xvector<8xf32>, 2>
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%1 = alloc() : memref<64x4xvector<8xf32>, 2>
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%2 = alloc() : memref<64x4xvector<8xf32>, 2>
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%3 = alloc() : memref<2xi32>
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%4 = alloc() : memref<2xi32>
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%5 = alloc() : memref<2xi32>
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// Prologue for DMA overlap on arg2.
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// CHECK-DAG: [[BUF_ARG2:%[0-9]+]] = alloc() : memref<2x64x4xvector<8xf32>, 2>
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// CHECK-DAG: [[TAG_ARG2:%[0-9]+]] = alloc() : memref<2x2xi32>
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// CHECK: affine.dma_start %{{.*}}[
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// CHECK: affine.for %{{.*}} = 1 to 8 {
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affine.for %i0 = 0 to 8 {
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%6 = affine.apply #map2(%i0)
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affine.dma_start %arg2[%6, %c0], %2[%c0, %c0], %5[%c0], %num_elts : memref<512x32xvector<8xf32>>, memref<64x4xvector<8xf32>, 2>, memref<2xi32>
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affine.dma_wait %5[%c0], %num_elts : memref<2xi32>
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// Steady state for DMA overlap on arg2
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// CHECK: affine.dma_start %{{.*}}[
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// CHECK: affine.dma_wait [[TAG_ARG2]]
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// Prologue for DMA overlap on arg0, arg1 nested within i0
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// CHECK: [[BUF_ARG0:%[0-9]+]] = alloc() : memref<2x64x4xvector<8xf32>, 2>
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// CHECK: [[BUF_ARG1:%[0-9]+]] = alloc() : memref<2x64x4xvector<8xf32>, 2>
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// CHECK: [[TAG_ARG0:%[0-9]+]] = alloc() : memref<2x2xi32>
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// CHECK: [[TAG_ARG1:%[0-9]+]] = alloc() : memref<2x2xi32>
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// CHECK: affine.dma_start %{{.*}}[
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// CHECK: affine.dma_start %{{.*}}[
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// CHECK-NEXT: affine.for %{{.*}} = 1 to 8 {
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affine.for %i1 = 0 to 8 {
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%7 = affine.apply #map1(%i0, %i1)
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%8 = affine.apply #map2(%i1)
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affine.dma_start %arg0[%7, %c0], %0[%c0, %c0], %3[%c0], %num_elts : memref<512x32xvector<8xf32>>, memref<64x4xvector<8xf32>, 2>, memref<2xi32>
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affine.dma_start %arg1[%8, %c0], %1[%c0, %c0], %4[%c0], %num_elts : memref<512x32xvector<8xf32>>, memref<64x4xvector<8xf32>, 2>, memref<2xi32>
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affine.dma_wait %3[%c0], %num_elts : memref<2xi32>
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affine.dma_wait %4[%c0], %num_elts : memref<2xi32>
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// Steady state for DMA overlap on arg0, arg1
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// CHECK: affine.dma_start %{{.*}}[
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// CHECK: affine.dma_start %{{.*}}[
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// CHECK: affine.dma_wait [[TAG_ARG0]]
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// CHECK: affine.dma_wait [[TAG_ARG1]]
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// CHECK-NEXT: affine.for %{{.*}} = 0 to 4 {
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affine.for %i2 = 0 to 4 {
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"foo"() : () -> ()
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}
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}
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// epilogue for arg0, arg1
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// CHECK: affine.dma_wait [[TAG_ARG0]]
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// CHECK: affine.dma_wait [[TAG_ARG1]]
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// CHECK-DAG: dealloc [[TAG_ARG1]] : memref<2x2xi32>
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// CHECK-DAG: dealloc [[TAG_ARG0]] : memref<2x2xi32>
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// CHECK-DAG: dealloc [[BUF_ARG1]] : memref<2x64x4xvector<8xf32>, 2>
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// CHECK-DAG: dealloc [[BUF_ARG0]] : memref<2x64x4xvector<8xf32>, 2>
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// epilogue for DMA overlap on %arg2
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// CHECK: affine.dma_wait [[TAG_ARG2]]
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// Within the epilogue for arg2's DMA, we have the DMAs on %arg1, %arg2 nested.
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// CHECK: [[BUF_ARG0_NESTED:%[0-9]+]] = alloc() : memref<2x64x4xvector<8xf32>, 2>
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// CHECK: [[BUF_ARG1_NESTED:%[0-9]+]] = alloc() : memref<2x64x4xvector<8xf32>, 2>
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// CHECK: [[TAG_ARG0_NESTED:%[0-9]+]] = alloc() : memref<2x2xi32>
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// CHECK: [[TAG_ARG1_NESTED:%[0-9]+]] = alloc() : memref<2x2xi32>
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// CHECK: affine.dma_start %{{.*}}[
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// CHECK: affine.dma_start %{{.*}}[
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// CHECK: affine.for %{{.*}} = 1 to 8 {
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// CHECK: affine.dma_start %{{.*}}[
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// CHECK: affine.dma_start %{{.*}}[
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// CHECK: affine.dma_wait [[TAG_ARG0_NESTED]]
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// CHECK: affine.dma_wait [[TAG_ARG1_NESTED]]
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// CHECK: affine.for %{{.*}} = 0 to 4 {
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// CHECK: "foo"() : () -> ()
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// CHECK: affine.dma_wait [[TAG_ARG0_NESTED]]
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// CHECK: affine.dma_wait [[TAG_ARG1_NESTED]]
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// CHECK: affine.for %{{.*}} = 0 to 4 {
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}
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dealloc %5 : memref<2xi32>
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dealloc %4 : memref<2xi32>
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dealloc %3 : memref<2xi32>
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dealloc %2 : memref<64x4xvector<8xf32>, 2>
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dealloc %1 : memref<64x4xvector<8xf32>, 2>
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dealloc %0 : memref<64x4xvector<8xf32>, 2>
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return
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// CHECK: }
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// CHECK-DAG: dealloc [[TAG_ARG1_NESTED]] : memref<2x2xi32>
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// CHECK-DAG: dealloc [[TAG_ARG0_NESTED]] : memref<2x2xi32>
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// CHECK-DAG: dealloc [[BUF_ARG1_NESTED]] : memref<2x64x4xvector<8xf32>, 2>
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// CHECK-DAG: dealloc [[BUF_ARG0_NESTED]] : memref<2x64x4xvector<8xf32>, 2>
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// CHECK-DAG: dealloc [[TAG_ARG2]] : memref<2x2xi32>
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// CHECK-DAG: dealloc [[BUF_ARG2]] : memref<2x64x4xvector<8xf32>, 2>
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// CHECK-NEXT: return
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}
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// -----
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#map2 = affine_map<(d0) -> ((d0 * 2048) floordiv 32)>
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// CHECK: func @loop_dma_dependent
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func @loop_dma_dependent(%arg2: memref<512x32xvector<8xf32>>) {
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%num_elts = constant 256 : index
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%c0 = constant 0 : index
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%0 = alloc() : memref<64x4xvector<8xf32>, 2>
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%1 = alloc() : memref<64x4xvector<8xf32>, 2>
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%2 = alloc() : memref<64x4xvector<8xf32>, 2>
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%3 = alloc() : memref<2xi32>
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%4 = alloc() : memref<2xi32>
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%5 = alloc() : memref<2xi32>
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// The two DMAs below are dependent (incoming and outgoing on the same
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// memref) in the same iteration; so no pipelining here.
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// CHECK-NOT: affine.dma_start
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// CHECK: affine.for %{{.*}} = 0 to 8 {
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affine.for %i0 = 0 to 8 {
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%6 = affine.apply #map2(%i0)
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affine.dma_start %arg2[%6, %c0], %2[%c0, %c0], %5[%c0], %num_elts : memref<512x32xvector<8xf32>>, memref<64x4xvector<8xf32>, 2>, memref<2xi32>
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affine.dma_wait %5[%c0], %num_elts : memref<2xi32>
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affine.dma_start %2[%c0, %c0], %arg2[%6, %c0], %5[%c0], %num_elts : memref<64x4xvector<8xf32>, 2>, memref<512x32xvector<8xf32>>, memref<2xi32>
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affine.dma_wait %5[%c0], %num_elts : memref<2xi32>
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}
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dealloc %5 : memref<2xi32>
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dealloc %4 : memref<2xi32>
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dealloc %3 : memref<2xi32>
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dealloc %2 : memref<64x4xvector<8xf32>, 2>
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dealloc %1 : memref<64x4xvector<8xf32>, 2>
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dealloc %0 : memref<64x4xvector<8xf32>, 2>
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return
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}
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// -----
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// CHECK-LABEL: func @escaping_use
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func @escaping_use(%arg0: memref<512 x 32 x f32>) {
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%c32 = constant 32 : index
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%num_elt = constant 512 : index
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%zero = constant 0 : index
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%Av = alloc() : memref<32 x 32 x f32, 2>
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%tag = alloc() : memref<1 x i32>
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// CHECK-NOT: affine.dma_start
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// CHECK: affine.for %{{.*}} = 0 to 16 {
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affine.for %kTT = 0 to 16 {
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affine.dma_start %arg0[%zero, %zero], %Av[%zero, %zero], %tag[%zero], %num_elt :
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memref<512 x 32 x f32>,
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memref<32 x 32 x f32, 2>, memref<1 x i32>
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affine.dma_wait %tag[%zero], %num_elt : memref<1 x i32>
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// escaping use; no DMA pipelining / double buffering will be done.
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"foo"(%Av) : (memref<32 x 32 x f32, 2>) -> ()
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}
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dealloc %tag : memref<1 x i32>
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dealloc %Av : memref<32 x 32 x f32, 2>
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return
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// CHECK: "foo"(%{{[0-9]+}}) : (memref<32x32xf32, 2>) -> ()
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// CHECK: }
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// CHECK: return
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}
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// -----
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// CHECK-LABEL: func @escaping_tag
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func @escaping_tag(%arg0: memref<512 x 32 x f32>) {
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%c32 = constant 32 : index
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%num_elt = constant 512 : index
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%zero = constant 0 : index
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%Av = alloc() : memref<32 x 32 x f32, 2>
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%tag = alloc() : memref<1 x i32>
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// CHECK-NOT: affine.dma_start
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// CHECK: affine.for %{{.*}} = 0 to 16 {
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affine.for %kTT = 0 to 16 {
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affine.dma_start %arg0[%zero, %zero], %Av[%zero, %zero], %tag[%zero], %num_elt :
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memref<512 x 32 x f32>,
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memref<32 x 32 x f32, 2>, memref<1 x i32>
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affine.dma_wait %tag[%zero], %num_elt : memref<1 x i32>
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// escaping use; no DMA pipelining / double buffering will be done.
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"foo"(%tag) : (memref<1 x i32>) -> ()
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}
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dealloc %tag : memref<1 x i32>
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dealloc %Av : memref<32 x 32 x f32, 2>
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return
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// CHECK: "foo"(%{{[0-9]+}}) : (memref<1xi32>) -> ()
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// CHECK: }
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// CHECK: return
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}
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// -----
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// CHECK-LABEL: func @live_out_use
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func @live_out_use(%arg0: memref<512 x 32 x f32>) -> f32 {
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%c32 = constant 32 : index
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%num_elt = constant 512 : index
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%zero = constant 0 : index
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%Av = alloc() : memref<32 x 32 x f32, 2>
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%tag = alloc() : memref<1 x i32>
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// CHECK-NOT: affine.dma_start
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// CHECK: affine.for %{{.*}} = 0 to 16 {
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affine.for %kTT = 0 to 16 {
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affine.dma_start %arg0[%zero, %zero], %Av[%zero, %zero], %tag[%zero], %num_elt :
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memref<512 x 32 x f32>,
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memref<32 x 32 x f32, 2>, memref<1 x i32>
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affine.dma_wait %tag[%zero], %num_elt : memref<1 x i32>
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}
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// Use live out of 'affine.for' op; no DMA pipelining will be done.
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%v = affine.load %Av[%zero, %zero] : memref<32 x 32 x f32, 2>
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dealloc %tag : memref<1 x i32>
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dealloc %Av : memref<32 x 32 x f32, 2>
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return %v : f32
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// CHECK: affine.load %{{[0-9]+}}[%{{.*}}, %{{.*}}] : memref<32x32xf32, 2>
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// CHECK: return
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}
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// -----
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// CHECK-LABEL: func @dynamic_shape_dma_buffer
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func @dynamic_shape_dma_buffer(%arg0: memref<512 x 32 x f32>) {
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%c32 = constant 32 : index
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%num_elt = constant 512 : index
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%zero = constant 0 : index
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%Av = alloc(%c32, %c32) : memref<? x ? x f32, 2>
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%tag = alloc() : memref<1 x i32>
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// Double buffering for dynamic shaped buffer.
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// CHECK: alloc(%{{.*}}, %{{.*}}) : memref<?x?xf32, 2>
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// CHECK-NEXT: %[[C0:.*]] = constant 0 : index
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// CHECK-NEXT: dim %{{.*}}, %[[C0]] : memref<?x?xf32, 2>
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// CHECK-NEXT: %[[C1:.*]] = constant 1 : index
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// CHECK-NEXT: dim %{{.*}}, %[[C1]] : memref<?x?xf32, 2>
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// CHECK-NEXT: alloc(%{{.*}}, %{{.*}}) : memref<2x?x?xf32, 2>
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// CHECK: affine.dma_start %{{.*}}[%{{.*}}, %{{.*}}], %{{.*}}[%{{.*}} mod 2, 0, 0], %{{.*}}[%{{.*}} mod 2, 0], %{{.*}}
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affine.for %kTT = 0 to 16 {
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affine.dma_start %arg0[%zero, %zero], %Av[%zero, %zero], %tag[%zero], %num_elt :
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memref<512 x 32 x f32>,
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memref<? x ? x f32, 2>, memref<1 x i32>
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affine.dma_wait %tag[%zero], %num_elt : memref<1 x i32>
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}
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dealloc %Av : memref<? x ? x f32, 2>
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return
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// CHECK-NEXT: affine.for %{{.*}} = 1 to 16 {
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// CHECK: affine.dma_start %{{.*}}[%{{.*}}, %{{.*}}], %{{.*}}[%{{.*}} mod 2, 0, 0], %{{.*}}[%{{.*}} mod 2, 0], %{{.*}}
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// CHECK: affine.dma_wait %{{.*}}[%{{.*}} mod 2, 0], %{{.*}} : memref<2x1xi32>
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// CHECK: }
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// CHECK: affine.dma_wait %{{.*}}[%{{.*}} mod 2, 0], %{{.*}} : memref<2x1xi32>
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// CHECK: return
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}
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// Memref replacement will fail here due to a non-dereferencing use. However,
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// no incorrect transformation is performed in spite of one of the uses being a
|
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// dereferencing one since replaceAllMemRefUsesWith checks for escaping uses
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// before performing any replacement.
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// CHECK-LABEL: func @escaping_and_indexed_use_mix
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func @escaping_and_indexed_use_mix() {
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%A = alloc() : memref<256 x f32, affine_map<(d0) -> (d0)>, 0>
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%Ah = alloc() : memref<32 x f32, affine_map<(d0) -> (d0)>, 1>
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%tag = alloc() : memref<1 x f32>
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%zero = constant 0 : index
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%num_elts = constant 32 : index
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|
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// alloc for the buffer is created but no replacement should happen.
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affine.for %i = 0 to 8 {
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affine.dma_start %A[%i], %Ah[%i], %tag[%zero], %num_elts : memref<256 x f32>, memref<32 x f32, 1>, memref<1 x f32>
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affine.dma_wait %tag[%zero], %num_elts : memref<1 x f32>
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"compute"(%Ah) : (memref<32 x f32, 1>) -> ()
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%v = affine.load %Ah[%i] : memref<32 x f32, affine_map<(d0) -> (d0)>, 1>
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"foo"(%v) : (f32) -> ()
|
|
}
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dealloc %A : memref<256 x f32, affine_map<(d0) -> (d0)>, 0>
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dealloc %Ah : memref<32 x f32, affine_map<(d0) -> (d0)>, 1>
|
|
return
|
|
}
|
|
// No replacement.
|
|
// CHECK: affine.for %{{.*}} = 0 to 8 {
|
|
// CHECK-NEXT: affine.dma_start %{{.*}}[%{{.*}}], %{{.*}}[%{{.*}}], %{{.*}}[%{{.*}}], %{{.*}}
|
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// CHECK-NEXT: affine.dma_wait %{{.*}}[%{{.*}}], %{{.*}} : memref<1xf32>
|
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// CHECK-NEXT: "compute"(%{{.*}}) : (memref<32xf32, 1>) -> ()
|
|
// CHECK-NEXT: [[VAL:%[0-9]+]] = affine.load %{{.*}}[%{{.*}}] : memref<32xf32, 1>
|
|
// CHECK-NEXT: "foo"([[VAL]]) : (f32) -> ()
|