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170 lines
5.5 KiB
170 lines
5.5 KiB
//===-- LanaiAsmBackend.cpp - Lanai Assembler Backend ---------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "LanaiFixupKinds.h"
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#include "MCTargetDesc/LanaiMCTargetDesc.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCDirectives.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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// Prepare value for the target space
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static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
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switch (Kind) {
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case FK_Data_1:
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case FK_Data_2:
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case FK_Data_4:
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case FK_Data_8:
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return Value;
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case Lanai::FIXUP_LANAI_21:
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case Lanai::FIXUP_LANAI_21_F:
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case Lanai::FIXUP_LANAI_25:
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case Lanai::FIXUP_LANAI_32:
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case Lanai::FIXUP_LANAI_HI16:
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case Lanai::FIXUP_LANAI_LO16:
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return Value;
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default:
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llvm_unreachable("Unknown fixup kind!");
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}
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}
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namespace {
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class LanaiAsmBackend : public MCAsmBackend {
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Triple::OSType OSType;
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public:
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LanaiAsmBackend(const Target &T, Triple::OSType OST)
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: MCAsmBackend(), OSType(OST) {}
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void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
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uint64_t Value, bool IsPCRel) const override;
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MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override;
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// No instruction requires relaxation
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bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
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const MCRelaxableFragment *DF,
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const MCAsmLayout &Layout) const override {
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return false;
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}
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
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unsigned getNumFixupKinds() const override {
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return Lanai::NumTargetFixupKinds;
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}
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bool mayNeedRelaxation(const MCInst &Inst) const override { return false; }
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void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
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MCInst &Res) const override {}
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bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
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};
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bool LanaiAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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if ((Count % 4) != 0)
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return false;
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for (uint64_t i = 0; i < Count; i += 4)
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OW->write32(0x15000000);
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return true;
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}
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void LanaiAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
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unsigned DataSize, uint64_t Value,
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bool IsPCRel) const {
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MCFixupKind Kind = Fixup.getKind();
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Value = adjustFixupValue(static_cast<unsigned>(Kind), Value);
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if (!Value)
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return; // This value doesn't change the encoding
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// Where in the object and where the number of bytes that need
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// fixing up
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unsigned Offset = Fixup.getOffset();
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unsigned NumBytes = (getFixupKindInfo(Kind).TargetSize + 7) / 8;
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unsigned FullSize = 4;
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// Grab current value, if any, from bits.
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uint64_t CurVal = 0;
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// Load instruction and apply value
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for (unsigned i = 0; i != NumBytes; ++i) {
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unsigned Idx = (FullSize - 1 - i);
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CurVal |= static_cast<uint64_t>(static_cast<uint8_t>(Data[Offset + Idx]))
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<< (i * 8);
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}
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uint64_t Mask =
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(static_cast<uint64_t>(-1) >> (64 - getFixupKindInfo(Kind).TargetSize));
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CurVal |= Value & Mask;
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// Write out the fixed up bytes back to the code/data bits.
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for (unsigned i = 0; i != NumBytes; ++i) {
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unsigned Idx = (FullSize - 1 - i);
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Data[Offset + Idx] = static_cast<uint8_t>((CurVal >> (i * 8)) & 0xff);
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}
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}
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MCObjectWriter *
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LanaiAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
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return createLanaiELFObjectWriter(OS,
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MCELFObjectTargetWriter::getOSABI(OSType));
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}
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const MCFixupKindInfo &
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LanaiAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
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static const MCFixupKindInfo Infos[Lanai::NumTargetFixupKinds] = {
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// This table *must* be in same the order of fixup_* kinds in
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// LanaiFixupKinds.h.
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// Note: The number of bits indicated here are assumed to be contiguous.
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// This does not hold true for LANAI_21 and LANAI_21_F which are applied
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// to bits 0x7cffff and 0x7cfffc, respectively. Since the 'bits' counts
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// here are used only for cosmetic purposes, we set the size to 16 bits
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// for these 21-bit relocation as llvm/lib/MC/MCAsmStreamer.cpp checks
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// no bits are set in the fixup range.
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//
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// name offset bits flags
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{"FIXUP_LANAI_NONE", 0, 32, 0},
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{"FIXUP_LANAI_21", 16, 16 /*21*/, 0},
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{"FIXUP_LANAI_21_F", 16, 16 /*21*/, 0},
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{"FIXUP_LANAI_25", 7, 25, 0},
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{"FIXUP_LANAI_32", 0, 32, 0},
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{"FIXUP_LANAI_HI16", 16, 16, 0},
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{"FIXUP_LANAI_LO16", 16, 16, 0}};
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if (Kind < FirstTargetFixupKind)
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return MCAsmBackend::getFixupKindInfo(Kind);
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assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
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"Invalid kind!");
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return Infos[Kind - FirstTargetFixupKind];
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}
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} // namespace
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MCAsmBackend *llvm::createLanaiAsmBackend(const Target &T,
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const MCRegisterInfo &MRI,
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const Triple &TheTriple,
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StringRef CPU) {
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if (!TheTriple.isOSBinFormatELF())
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llvm_unreachable("OS not supported");
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return new LanaiAsmBackend(T, TheTriple.getOS());
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}
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