You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
86 lines
3.9 KiB
86 lines
3.9 KiB
/*
|
|
* Copyright (c) Hisilicon Technologies Co., Ltd. 2014-2019. All rights reserved.
|
|
* Description : drv vfe-part
|
|
* Author : sdk
|
|
* Create : 2014-12-27
|
|
*/
|
|
|
|
#ifndef __DRV_VFE_H__
|
|
#define __DRV_VFE_H__
|
|
|
|
#include "drv_vfe_ext.h"
|
|
|
|
#ifdef __cplusplus
|
|
#if __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
#endif /* end of #ifdef __cplusplus */
|
|
|
|
/************************** macro definition start***************************/
|
|
#define RGB_MUX1_SEL_CP_N_HANG 0
|
|
#define VFE_WORKMODE_MAX 2
|
|
#define VFE_SLICER_LEVEL_MAX 31
|
|
#define CFG_VFE_TWO_ROUTE_SUPPORT 0
|
|
#define CFG_CUSTOM_HDDEC_SET_VCLAMP_SUPPORT 0
|
|
#define VFE_CVBS_PIN_N 0
|
|
#define vfe_comm_reg_read(reg_base, offset) ({ *((volatile td_u32 *)((td_u8 *)(reg_base) + (offset))); })
|
|
#define vfe_comm_reg_write(reg_base, offset, value) ({ *((volatile td_u32 *)((td_u8 *)(reg_base) + \
|
|
(offset))) = (value); })
|
|
/************************* functions realization ****************************/
|
|
#define INVLIAD_MUX_VAL 0xFF
|
|
|
|
#define is_chan_r_in(in) ((in) == EXT_DRV_INPUT_MUX_R || (in) == EXT_DRV_INPUT_MUX_PR0 || (in) == EXT_DRV_INPUT_MUX_PR1)
|
|
#define is_chan_g_in(in) ((in) == EXT_DRV_INPUT_MUX_G || (in) == EXT_DRV_INPUT_MUX_Y0 || (in) == EXT_DRV_INPUT_MUX_Y1)
|
|
#define is_chan_b_in(in) ((in) == EXT_DRV_INPUT_MUX_B || (in) == EXT_DRV_INPUT_MUX_PB0 || (in) == EXT_DRV_INPUT_MUX_PB1)
|
|
|
|
#define is_cvbs_in(in) ((in) == EXT_DRV_INPUT_MUX_CVBS0 || (in) == EXT_DRV_INPUT_MUX_CVBS1 || \
|
|
(in) == EXT_DRV_INPUT_MUX_CVBS2 || (in) == EXT_DRV_INPUT_MUX_CVBS3)
|
|
#define is_sif_in(in) ((in) == EXT_DRV_INPUT_MUX_CVBS0 || (in) == EXT_DRV_INPUT_MUX_CVBS1 || \
|
|
(in) == EXT_DRV_INPUT_MUX_CVBS2 || (in) == EXT_DRV_INPUT_MUX_CVBS3)
|
|
|
|
#define is_input_mux(in, mux) (((in)->r_chn_mux) == (mux) || ((in)->g_chn_mux) == (mux) || ((in)->b_chn_mux) == (mux))
|
|
|
|
/************************* variable definition start*************************/
|
|
typedef enum ext_drv_vfe_pll_mode {
|
|
EXT_DRV_VFE_PLL_MODE_HDDEC = 0,
|
|
EXT_DRV_VFE_PLL_MODE_TVD_CVBS,
|
|
EXT_DRV_VFE_PLL_MODE_TVD_SVIDEO,
|
|
EXT_DRV_VFE_PLL_MODE_TVD_SCART,
|
|
EXT_DRV_VFE_PLL_MODE_TVD_RF,
|
|
EXT_DRV_VFE_PLL_MODE_HDDEC_A_TVD, /* 一屏双显 */
|
|
|
|
EXT_DRV_VFE_PLL_MODE_BUTT,
|
|
} ext_drv_vfe_pll_mode;
|
|
/************************** variable definition end**************************/
|
|
|
|
typedef struct ext_vfe_drv_ctx {
|
|
ext_drv_vfe_source_attr source_attr; /* 输入属性，包含工作模式和输入通道选择 */
|
|
ext_drv_vfe_pll_attr pll_attr; /* pll属性 */
|
|
ext_drv_vfe_clamp_attr r_chn_clamp, g_chn_clamp, b_chn_clamp, com_chn_clamp; /* 嵌位属性 */
|
|
ext_drv_vfe_lpf_mode r_chn_lpf_mode, g_chn_lpf_mode, b_chn_lpf_mode; /* RGB通道低通滤波 */
|
|
ext_drv_vfe_filter_attr com_chn_filter; /* COM通道低通滤波 */
|
|
ext_drv_vfe_sync_type dpll_sync_sel; /* 同步类型 */
|
|
td_u32 phase; /* 相位 */
|
|
} vfe_drv_ctx, *vfe_drv_ctx_s_ptr;
|
|
|
|
/*************************** macro definition end****************************/
|
|
extern vfe_drv_ctx g_vfe_drv_ctx[VFE_WORKMODE_MAX];
|
|
|
|
td_s32 ext_drv_vfe_get_gain(td_handle vfe, ext_drv_vfe_data_chn_type data_chn, td_u32 *gain);
|
|
td_s32 ext_drv_vfe_get_offset(td_handle vfe, ext_drv_vfe_data_chn_type data_chn, td_u32 *offset);
|
|
td_s32 ext_drv_vfe_get_sif_gain(td_handle vfe, td_u32 *sif_gain);
|
|
td_s32 ext_drv_vfe_get_slicer_level(td_handle vfe, ext_drv_vfe_sync_chn_type sync_chn, td_u32 *level);
|
|
td_s32 ext_drv_vfe_cfg_video_out(ext_drv_vfe_video_out_chn video_out_chn,
|
|
td_bool enable, ext_drv_source ensource);
|
|
td_void ext_vfe_drv_pm_lowpower_enter(td_void);
|
|
td_void ext_vfe_drv_pm_lowpower_exit(td_void);
|
|
|
|
#ifdef __cplusplus
|
|
#if __cplusplus
|
|
}
|
|
#endif
|
|
#endif /* end of #ifdef __cplusplus */
|
|
|
|
#endif /* __DRV_VFE_H__ */
|
|
|