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100 lines
2.2 KiB
100 lines
2.2 KiB
/*
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* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <cpuamu.h>
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.globl cpuamu_cnt_read
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.globl cpuamu_cnt_write
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.globl cpuamu_read_cpuamcntenset_el0
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.globl cpuamu_read_cpuamcntenclr_el0
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.globl cpuamu_write_cpuamcntenset_el0
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.globl cpuamu_write_cpuamcntenclr_el0
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/*
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* uint64_t cpuamu_cnt_read(unsigned int idx);
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*
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* Given `idx`, read the corresponding AMU counter
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* and return it in `x0`.
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*/
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func cpuamu_cnt_read
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adr x1, 1f
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add x1, x1, x0, lsl #3 /* each mrs/ret sequence is 8 bytes */
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#if ENABLE_BTI
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add x1, x1, x0, lsl #2 /* + "bti j" instruction */
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#endif
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br x1
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1: read CPUAMEVCNTR0_EL0
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read CPUAMEVCNTR1_EL0
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read CPUAMEVCNTR2_EL0
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read CPUAMEVCNTR3_EL0
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read CPUAMEVCNTR4_EL0
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endfunc cpuamu_cnt_read
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/*
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* void cpuamu_cnt_write(unsigned int idx, uint64_t val);
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*
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* Given `idx`, write `val` to the corresponding AMU counter.
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*/
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func cpuamu_cnt_write
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adr x2, 1f
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add x2, x2, x0, lsl #3 /* each msr/ret sequence is 8 bytes */
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#if ENABLE_BTI
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add x2, x2, x0, lsl #2 /* + "bti j" instruction */
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#endif
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br x2
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1: write CPUAMEVCNTR0_EL0
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write CPUAMEVCNTR1_EL0
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write CPUAMEVCNTR2_EL0
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write CPUAMEVCNTR3_EL0
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write CPUAMEVCNTR4_EL0
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endfunc cpuamu_cnt_write
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/*
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* unsigned int cpuamu_read_cpuamcntenset_el0(void);
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*
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* Read the `CPUAMCNTENSET_EL0` CPU register and return
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* it in `x0`.
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*/
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func cpuamu_read_cpuamcntenset_el0
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mrs x0, CPUAMCNTENSET_EL0
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ret
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endfunc cpuamu_read_cpuamcntenset_el0
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/*
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* unsigned int cpuamu_read_cpuamcntenclr_el0(void);
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*
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* Read the `CPUAMCNTENCLR_EL0` CPU register and return
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* it in `x0`.
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*/
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func cpuamu_read_cpuamcntenclr_el0
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mrs x0, CPUAMCNTENCLR_EL0
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ret
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endfunc cpuamu_read_cpuamcntenclr_el0
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/*
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* void cpuamu_write_cpuamcntenset_el0(unsigned int mask);
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*
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* Write `mask` to the `CPUAMCNTENSET_EL0` CPU register.
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*/
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func cpuamu_write_cpuamcntenset_el0
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msr CPUAMCNTENSET_EL0, x0
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ret
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endfunc cpuamu_write_cpuamcntenset_el0
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/*
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* void cpuamu_write_cpuamcntenclr_el0(unsigned int mask);
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*
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* Write `mask` to the `CPUAMCNTENCLR_EL0` CPU register.
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*/
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func cpuamu_write_cpuamcntenclr_el0
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msr CPUAMCNTENCLR_EL0, x0
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ret
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endfunc cpuamu_write_cpuamcntenclr_el0
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