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231 lines
9.3 KiB
231 lines
9.3 KiB
/*
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* Copyright (C) 2018 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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// Contains the implementation of the operations.
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#define LOG_TAG "Operations"
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#include <vector>
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#include "OperationResolver.h"
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#include "Operations.h"
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#include "Tracing.h"
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#ifdef NN_INCLUDE_CPU_IMPLEMENTATION
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#include <tensorflow/lite/kernels/internal/reference/legacy_reference_ops.h>
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#include "CpuOperationUtils.h"
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#endif // NN_INCLUDE_CPU_IMPLEMENTATION
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namespace android {
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namespace nn {
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namespace strided_slice {
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constexpr uint32_t kNumInputs = 7;
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constexpr uint32_t kInputTensor = 0;
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constexpr uint32_t kBeginTensor = 1;
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constexpr uint32_t kEndTensor = 2;
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constexpr uint32_t kStridesTensor = 3;
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constexpr uint32_t kBeginMask = 4;
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constexpr uint32_t kEndMask = 5;
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constexpr uint32_t kShrinkAxisMask = 6;
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constexpr uint32_t kNumOutputs = 1;
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constexpr uint32_t kOutputTensor = 0;
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#ifdef NN_INCLUDE_CPU_IMPLEMENTATION
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namespace {
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template <typename T>
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bool compute(const T* inputData, const Shape& inputShape, const int32_t* beginData,
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const int32_t* endData, const int32_t* stridesData, int32_t beginMask, int32_t endMask,
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int32_t shrinkAxisMask, T* outputData, const Shape& outputShape) {
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NNTRACE_TRANS("stridedSlice");
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// This Op only supports 1-4D cases and since we use the reference 4D
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// implementation, the 1-3D tensors are mapped to 4D.
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const int kMaxDim = 4;
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std::vector<int> starts;
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std::vector<int> stops;
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std::vector<int> strides;
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int32_t numInputDims = static_cast<int32_t>(getNumberOfDimensions(inputShape));
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for (int32_t idx = numInputDims - 1; idx >= 0; --idx) {
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starts.emplace_back(beginData[idx]);
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stops.emplace_back(endData[idx]);
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strides.emplace_back(stridesData[idx]);
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}
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for (int i = numInputDims; i < kMaxDim; i++) {
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starts.emplace_back(0);
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stops.emplace_back(1);
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strides.emplace_back(1);
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}
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beginMask = ReverseMaskBits(beginMask, numInputDims);
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endMask = ReverseMaskBits(endMask, numInputDims);
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shrinkAxisMask = ReverseMaskBits(shrinkAxisMask, numInputDims);
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tflite::reference_ops::StridedSlice(inputData, convertShapeToDims(inputShape), beginMask,
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endMask, shrinkAxisMask, starts, stops, strides, outputData,
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convertShapeToDims(outputShape));
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return true;
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}
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template <typename T>
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bool executeTyped(IOperationExecutionContext* context) {
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return compute<T>(
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context->getInputBuffer<T>(kInputTensor), context->getInputShape(kInputTensor),
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context->getInputBuffer<int32_t>(kBeginTensor),
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context->getInputBuffer<int32_t>(kEndTensor),
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context->getInputBuffer<int32_t>(kStridesTensor),
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context->getInputValue<int32_t>(kBeginMask), context->getInputValue<int32_t>(kEndMask),
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context->getInputValue<int32_t>(kShrinkAxisMask),
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context->getOutputBuffer<T>(kOutputTensor), context->getOutputShape(kOutputTensor));
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}
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} // namespace
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#endif // NN_INCLUDE_CPU_IMPLEMENTATION
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Result<Version> validate(const IOperationValidationContext* context) {
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NN_RET_CHECK_EQ(context->getNumInputs(), kNumInputs);
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NN_RET_CHECK_EQ(context->getNumOutputs(), kNumOutputs);
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OperandType inputType = context->getInputType(kInputTensor);
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NN_RET_CHECK(inputType == OperandType::TENSOR_FLOAT16 ||
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inputType == OperandType::TENSOR_FLOAT32 ||
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inputType == OperandType::TENSOR_QUANT8_ASYMM ||
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inputType == OperandType::TENSOR_QUANT8_ASYMM_SIGNED)
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<< "Unsupported input operand type for STRIDED_SLICE op: " << inputType;
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Version minSupportedVersion;
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if (inputType == OperandType::TENSOR_QUANT8_ASYMM_SIGNED) {
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minSupportedVersion = Version::ANDROID_R;
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} else if (inputType == OperandType::TENSOR_FLOAT16) {
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minSupportedVersion = Version::ANDROID_Q;
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} else {
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minSupportedVersion = Version::ANDROID_P;
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}
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NN_RET_CHECK(validateInputTypes(context, {
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inputType,
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OperandType::TENSOR_INT32,
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OperandType::TENSOR_INT32,
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OperandType::TENSOR_INT32,
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OperandType::INT32,
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OperandType::INT32,
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OperandType::INT32,
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}));
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NN_RET_CHECK(validateOutputTypes(context, {inputType}));
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const Shape& input = context->getInputShape(kInputTensor);
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if (hasKnownRank(input)) {
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NN_RET_CHECK_LE(getNumberOfDimensions(input), 4);
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}
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return minSupportedVersion;
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}
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#ifdef NN_INCLUDE_CPU_IMPLEMENTATION
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bool prepare(IOperationExecutionContext* context) {
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// StridedSlice op only supports 1D-4D input arrays.
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const Shape& inputShape = context->getInputShape(kInputTensor);
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uint32_t numInputDims = getNumberOfDimensions(inputShape);
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NN_OPS_CHECK(numInputDims <= 4);
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const Shape& beginShape = context->getInputShape(kBeginTensor);
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const Shape& endShape = context->getInputShape(kEndTensor);
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const Shape& stridesShape = context->getInputShape(kStridesTensor);
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NN_OPS_CHECK(getNumberOfDimensions(beginShape) == 1);
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NN_OPS_CHECK(getNumberOfDimensions(endShape) == 1);
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NN_OPS_CHECK(getNumberOfDimensions(stridesShape) == 1);
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NN_OPS_CHECK(getSizeOfDimension(beginShape, 0) == numInputDims);
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NN_OPS_CHECK(getSizeOfDimension(endShape, 0) == numInputDims);
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NN_OPS_CHECK(getSizeOfDimension(stridesShape, 0) == numInputDims);
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NN_OPS_CHECK(beginShape.type == OperandType::TENSOR_INT32);
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NN_OPS_CHECK(endShape.type == OperandType::TENSOR_INT32);
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NN_OPS_CHECK(stridesShape.type == OperandType::TENSOR_INT32);
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const int32_t* beginData = context->getInputBuffer<int32_t>(kBeginTensor);
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const int32_t* endData = context->getInputBuffer<int32_t>(kEndTensor);
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const int32_t* stridesData = context->getInputBuffer<int32_t>(kStridesTensor);
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const int32_t beginMask = context->getInputValue<int32_t>(kBeginMask);
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const int32_t endMask = context->getInputValue<int32_t>(kEndMask);
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const int32_t shrinkAxisMask = context->getInputValue<int32_t>(kShrinkAxisMask);
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// Determine size of output tensor and map indices
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std::vector<uint32_t> outDims;
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for (int32_t idx = 0; idx < static_cast<int32_t>(numInputDims); idx++) {
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int32_t dim = static_cast<int32_t>(getSizeOfDimension(inputShape, idx));
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int32_t stride = stridesData[idx];
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// stride value has to be non-zero
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NN_OPS_CHECK(stride != 0);
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bool positiveStride = stride > 0;
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int32_t begin = beginMask & (1 << idx) ? positiveStride ? 0 : dim - 1
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: ClampedIndex(beginData[idx], dim, positiveStride);
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int32_t end = endMask & (1 << idx) ? positiveStride ? dim : -1
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: ClampedIndex(endData[idx], dim, positiveStride);
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// This is valid for both positive and negative strides
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int32_t outDim = ceil((end - begin) / static_cast<float>(stride));
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outDim = outDim < 0 ? 0 : static_cast<uint32_t>(outDim);
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if (!(shrinkAxisMask & (1 << idx))) {
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outDims.push_back(outDim);
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} else {
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// Only positive stride is allowed on non-range indexing (i.e. shrinkMask is set).
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NN_RET_CHECK_GT(stride, 0) << "index = " << idx;
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NN_RET_CHECK_EQ(outDim, 1) << "index = " << idx;
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}
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}
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// Handle the case when all dimensions are removed
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if (outDims.empty()) {
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outDims.push_back(1);
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}
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Shape outputShape = context->getOutputShape(kOutputTensor);
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NN_RET_CHECK(SetShape(inputShape, &outputShape));
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outputShape.dimensions = outDims;
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return context->setOutputShape(kOutputTensor, outputShape);
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}
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bool execute(IOperationExecutionContext* context) {
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switch (context->getInputType(kInputTensor)) {
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case OperandType::TENSOR_FLOAT16:
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return executeTyped<_Float16>(context);
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case OperandType::TENSOR_FLOAT32:
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return executeTyped<float>(context);
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case OperandType::TENSOR_QUANT8_ASYMM:
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return executeTyped<uint8_t>(context);
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case OperandType::TENSOR_QUANT8_ASYMM_SIGNED:
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return executeTyped<int8_t>(context);
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default:
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NN_RET_CHECK_FAIL() << "Unsupported tensor type for STRIDED_SLICE op.";
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}
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}
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#endif // NN_INCLUDE_CPU_IMPLEMENTATION
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} // namespace strided_slice
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NN_REGISTER_OPERATION(STRIDED_SLICE, "STRIDED_SLICE", strided_slice::validate,
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strided_slice::prepare, strided_slice::execute);
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} // namespace nn
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} // namespace android
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